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product structure silicon monolithic integrated circuit this product is not designed prot ection against radioactive rays 1/92 tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 14? 001 datashee t 24bit audio codec series 3w+3w class ab/d speaker amp stereo audio codec BU26156RFS general description BU26156RFS is low power stereo audio codecs with built-in various acoustic effects. BU26156RFS has stereo line and monaural mic inputs that can input to 2vrms, stereo speaker amplifier that can change class ab / d and stereo headphone outputs.bu26156 also has built-in voltage regulator for the stability of codec characteristic that is s ensitive to the outside noise. features ? 24bit stereo adc, dac ? 2vrms input available, stereo line input with alc ? monoraul mic input with alc ? switch class ab/d 3w stereo speaker amplifier ? am avoidance function ? stereo headphone output amplifier ? digital signal processing ? high power supply rejection ratio characteristic applications ? radio cassette recorder ? pc speaker important characteristic ? supply voltage splvdd,sprvdd: 2.7v to 5.5v hvdd1: 2.7v to 3.6v hpvdd: 2.7v to 3.6v iovdd: 1.65v to 5.5v ? mic-adc snr: 87[db](typ.) ? line-adc snr: 93[db](typ.) ? dac-sp snr: 86[db](typ.) ? dac-lout snr: 95[db](typ.) ? operating temperature: -20 to +85 package w(typ.) x d(typ.) x h(max.) htssop-a44r 18.50mm x 9.50mm x 1.00mm figure 1. htssop-a44r basic block diagram figure 2.
datasheet datasheet 2/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15? 001 pin layout htssop-a44r top view figure 3. pin description no name i/o power function reset no use 25 resetb i iovdd reset pin ?l? level : reset enable. ?h? level : reset disable. (input) - 23 sdata /sda io iovdd 3 wire interface: data input output pin it is indicated as sdata on the description of ac characteristics. 2 wire interface : data input output pin (note1) it is indicated as sda on the description of ac characteristics. (input) - 22 sclk /sad i iovdd 3 wire interface : serial clock input pin it is indicated as sclk on the description of ac characteristics. 2 wire interface: slave address pin future explanation indicates sad. choose from the following two kinds. sad pin=hgnd : ?0011010? (input) dgnd hpoutl hpgnd 3 1 hpoutr 2 hpoutcap 4 nc 5 splvdd splp 8 6 splm 7 splgnd 9 sprgnd 10 sprp sprvdd 13 11 sprm 12 spmute 14 beepin 15 micbias 17 micbiasref 16 hvdd 1 18 agnd 19 regout 20 dgnd 21 hpvdd lin 3l 42 44 lin 3 r 43 lin2 r 41 lin 2l 40 lin 1 r vmid 37 39 lin 1l 38 agnd 36 minp 35 minm mclki 32 34 pllc 33 bclk 31 lrclk 30 sdout 28 sdin 29 iovdd 27 irqb 26 resetb 25 csb/scl 24 sclk/sad 22 sdata/sda 23
datasheet datasheet 3/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15? 001 sad pin=iovdd : ?0011011? 24 csb /scl i iovdd 3 wire interface : chip select input pin it is indicated as csb on the description of ac characteristics. 2 wire interface : serial clock input pin (note1) it is indicated as scl on the description of ac characteristics. (input) - 30 lrclk io iovdd sai lr clock input/output pin (input) dgnd 31 bclk io iovdd sai bit clock input/output pin (input) dgnd 29 sdin i iovdd sai serial data input pin (input) dgnd 28 sdout o iovdd sai serial data output pin dgnd open 32 mclki i iovdd master clock pin (input) dgnd 26 irqb o iovdd interrupt output pin iovdd open 38 lin1l i regout line analog input lch pin 1 (input) open, or coupling capacitor connected to agnd near by bu26156 39 lin1r i regout line analog input rch pin 1 (input) 40 lin2l i regout line analog input lch pin 2 (input) 41 lin2r i regout line analog input rch pin 2 (input) 42 lin3l i regout line analog input lch pin 3 (input) 43 lin3r i regout line analog input rch pin 3 (input) 35 minp i regout analog microphone + input (input) 34 minm i regout analog microphone - input (input) 15 beepin i regout line input pin. the input signal for this pin can output headphone output pins or speaker output pins. (input) 16 micbiasref o hvdd1 external filter pin for microphone bias. a capacitor is connected between micbiasref and agnd. angd open 1 micbias o hvdd1 microphone bias voltage output pin a capacitor is connected between micbiascap and agnd. agnd open 37 vmid o regout analog reference voltage pin a capacitor is connected between vmid and agnd. agnd - 20 regout o hvdd1 regulator output pin a capacitor is connected between regout and hgnd1. please put in the chip close as much as possible. agnd - 8 splp o splvdd speaker lch output + pin splgnd open 7 splm o splvdd speaker lch output - pin splgnd open 11 sprp o sprvdd speaker rch output + pin sprgnd open 12 sprm o sprvdd speaker rch output - pin sprgnd open 14 spmute i iovdd test control pin ?l? level : release mute ?h? level : mute dgnd open 1 hpoutl o hpvdd headphone lch output pin hpgnd open 2 hpoutr o hpvdd headphone rch output pin hpgnd open 32 loutcap o hvdd1 headphone ou tput capacitance pin agnd open 33 pllc o regout pll filter pin the width of the clock frequency to input can be expanded. agnd open 27 iovdd p - interface power supply pin a capacitor is connected between iovdd and hgnd1. - - 6 splvdd p - speaker lch power supply pin it is used on the same voltage as sprvdd. a capacitor is connected between splvdd and splgnd. - - 9 splgnd p - speaker lch ground pin - - 13 sprvdd p - speaker rch power supply pin it is used on the same voltage as splvdd. a capacitor is connected between sprvdd and sprgnd. - - 10 sprgnd p - speaker rch ground pin - - 18 hvdd1 p - high voltage power supply 1 pin a capacitor is connected between hvdd1 and hgnd1. - - 19, 36 agnd p - analog ground pin - - 21 dgnd p digital ground pin
datasheet datasheet 4/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15? 001 44 hpvdd p headphone power supply pin. a capacitor is connected between hpvdd and hpgnd. 3 hpgnd p headphone ground pin. 5 nc - no connection pin. set open this pin. open (note1)in case of 2 wire serial, if this pin is used with ex ternal pull-up resistor, it possibly gets noise from power. theref ore tamper noise design is required in the noisy environment. application examples figure 4. application examples1(use internal speaker amplifier) figure 5. application examples2 (use external speaker amplifier)
datasheet datasheet 5/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15? 001 absolute maxi mum ratings parameter symbol condition rating unit splvdd, sprvdd supply voltage splvdd sprvdd - -0.3 to 7.0 v hpvdd supply voltage hpvdd - -0.3 to 4.5 v hvdd1 supply voltage hvdd1 - -0.3 to 4.5 v iovdd supply voltage iovdd - -0.3 to 7.0 v input voltage v in mclki, lrclk, bclk, sdin, sdata/sda, sclk/sad, csb/scl, spmute -0.3 to iovdd+0.3 v lin1l, lin1r, lin2l, lin2r, minl, minr, beepin -0.3 to regout+0.3 v storage temperature tstg - -55 to +150 c package power dissipation jc htssop-a44r 2 (tjmax=+125 ) /w output current 1 iosp splm, splp, sprm, sprp -1.0 to +1.0 a output current 2 iolo hpoutl, hpoutr -100 to +100 ma output current 3 iorego regout -30 to 0 ma output current 4 ioo all digital pins -8 to +8 ma do not short the output pin to another out put pin, power supply pin or gnd pin. (output pin includes an io pin which is in output mode) caution: operating the ic over the absolute maximum ratings may damage the ic. the damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. therefore, it is import ant to consider circuit protection measures, such as adding a f use, in case the ic is operated over the absolute maximum ratings. recommended operating condition parameter symbol condition rating unit splvdd, sprvdd supply voltage splvdd sprvdd splvdd=sprvdd 2.7 to 5.5 v hpvdd supply voltage hpvdd - 2.7 to 3.6 v hvdd1 supply voltage hvdd1 - 2.7 to 3.6 v iovdd supply voltage iovdd - 1.65 to 5.5 v operating temperature top - -20 to +85 c *the radiation-proof design is not carried out.
datasheet datasheet 6/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15? 001 electrical characteristics dc characteristics (all gnd terminals=0v, hvdd1=3.3v, iovdd= 3.3v, splvdd=sprvdd=hpvdd=3.3v, ta=25c) parameter symbol condit ion min. typ. max. uni t related pin ?h? input voltage 1 vih1 dgnd=0v iovdd0.8 - iovdd+0.3 v resetb, sdata/sda, sclk/sad, csb/scl, spmute and mclki pins. ?h? input voltage 2 vih2 dgnd=0v iovdd0.7 - iovdd+0.3 v lrclk, bclk and sdin pins. ?l? input voltage vil dgnd=0v -0.3 - iovdd0.2 v all digital input ?h? output voltage voh ioh=-1ma iovdd0.85 - - v except sda ?l? output voltage 1 vol1 iol=1ma - - iovdd0.15 v except sda ?l? output voltage 2 vol2 iol=3ma, iovdd R2v iovdd <2v - - - - 0.4 iovdd0.2 v sda ?h? input leakage current 1 iih1 vih= iovdd - - 10 a except spmute ?l? input leakage current iil vil=dgnd -10 - - a all digital input ?z? output leakage current iozh voh=iovdd - - 10 a sda ?z? output leakage current iozl vol=dgnd -10 - - a sda stanby current hvdd1 iddsh1 resetb=?l? - 0.1 10 a splvdd+spr vdd iddssp - 0.1 10 a hpvdd iddshp - 0.1 10 a iovdd iddsio - 0.1 10 a operating current 1, dac mixvol headphone output ( fs48khz, no load, no signal input, sound effect off ) hvdd1 iddo1h1 headphone output, no load, no signal input, sound effect off - 6.2 9.5 ma splvdd+spr vdd iddo1sp - 0.02 0.1 ma hpvdd iddo1hp - 1.0 1.3 ma iovdd iddo1io - 0.03 0.1 ma operating current 2, dac mixvol d-class speaker output ( fs48khz, no load, no signal input, sound effect off ) hvdd1 iddo2h1 d-class speaker output, no load, no signal input, sound effect off - 6.2 8.2 ma splvdd+spr vdd iddo2sp - 3.3 7.4 ma spvdd=3.3v splvdd+spr vdd iddo2sp_5 - 5.0 - ma spvdd=5v hpvdd iddo2hp - 0.03 0.1 ma iovdd iddo2io - 0.03 0.1 ma operating current 3, dac mixvol ab-class speaker output ( fs48khz, no load, no signal input, sound effect off ) hvdd1 iddo3h1 ab-class speaker output, no load, no signal input, sound effect off - 6.2 8.2 ma splvdd+spr vdd iddo3sp - 5.0 9.6 ma spvdd=3.3v splvdd+spr vdd iddo3sp_5 - 6.0 - ma spvdd=5v
datasheet datasheet 7/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15? 001 hpvdd iddo3hp - 0.03 0.1 ma iovdd iddo3io - 0.03 0.1 ma operating current 4, micin linemix adc ( fs48khz, sin1khz-full scale input, micbias enable, mic alc off, sound effect off ) hvdd1 iddo4h1 fs48khz, no signal input,, micbias enable, mic alc off, sound effect off - 12.3 16.9 ma splvdd+spr vdd iddo4sp - 0.02 0.1 ma hpvdd iddo4hp - 0.03 0.1 ma iovdd iddo4io - 0.03 0.1 ma operating current 5, linein llinemix adc ( fs48khz, sin1khz-full scale input, linealc off, sound effect off ) hvdd1 iddo5h1 fs48khz, no signal input, line alc off, sound effect off - 11.2 13.8 ma splvdd+spr vdd iddo5sp - 0.02 0.1 ma hpvdd iddo5hp - 0.03 0.1 ma iovdd iddo5io - 0.03 0.1 ma operating power (all gnd terminals=0v, iovdd=3.3v, hvdd1=3.3 v, splvdd=sprvdd=5.0v, hpvdd=3.3v, ta=25c) paramete r symbol condition min typ max unit regulator output regout output level vregout - 1.7 1.8 1.9 v beep input full scale input signal level vbinfs - - - 1 vpp line input ( r lin =22 k ? / line gain=-9db / digital volume=0.0db / line alc=off ) full scale input signal level vlinfs lin1l, lin2l, lin3l, lin1r, lin2r, lin3r - - 2.0 vrms mic input (mic gain=20.25db / digital volume=0.0db / mic alc=off) full scale input signal level vminfs1 minp,minm - - 0.124 vp-p input resistance rmin1 minp,minm 20 30 40 k ? mic input (mic gain=9.0db / digital volume=0.0db / mic alc=off) full scale input signal level vminfs2 minp,minm - - 0.454 vp-p input resistance rmin2 minp,minm 20 30 40 k ? analog reference level (vmid-pin) analog reference voltage vref - 0.9x regout/2 1.0x regout/2 1.1x regout/2 v microphone bias (micbias-pin) output voltage (vmic datasheet datasheet 8/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15? 001 power supply rejection ratio psrr1 hvdd1 on 100mvp-p, 1khz ripple, no signal input - 90 - db analog mic inputs to adc out (mic gain=20.25db / line mix gain = 0db / digital volume=0.0db / mic alc=off) s/(n+d) snd2 -1dbfs/ a-weighted - 79 - db s/n snr2 a-weighted - 81 - db power supply rejection ratio psrr2 hvdd1 on 100mvp-p, 1khz ripple, no signal input - 89 - db analog mic inputs to adc out (mic gain=9.0db / digital volu me=0.0db / mic alc=off) s/(n+d) snd3 -1dbfs/ a-weighted - 80 - db s/n snr3 a-weighted - 87 - db power supply rejection ratio psrr3 hvdd1 on 100mvp-p, 1khz ripple, no signal input - 90 - db dac to headphone out (hpoutl/hpoutr, with 220fcuppling 16 ? load) output power po4 thd+n=1%, rl=16 ? - 60 - mw total harmonic distortion thd4 -6dbfs input / a-weighted - 79 - db signal to noise ratio snr4 a-weighted - 90 - db power supply rejection ratio psrr4 hpvdd on 100mvp-p,1khz ripple, no signal input - 60 - db hvdd1 on 100mvp-p,1khz ripple - 80 - db dac to class-ab speaker out (splp/splm, sprp/sprm, with 8 ? / 50pf load ) output power po5-1 spmixg=12db, rl=8 ? ,thd=1% - 1.4 - w po5-2 spmixg=12db, rl=8 ? ,thd=10% - 1.7 - w po5-3 spmixg=12db, rl=4 ? ,thd=1% 1.5 2.5 - w po5-4 spmixg=12db, rl=4 ? ,thd=10% 2 3 - w total harmonic distortion thd5 po=1w, rl=8 ? / a-weighted - 62 - db signal to noise ratio snr5 a-weighted - 91 - db power supply rejection ratio psrr5 splvdd / sprvdd on 100mvp-p,1khz ripple - 60 - db hvdd1 on 100mvp-p,1khz ripple - 80 - db dac to class-d speaker out (splvdd=sprvdd=5v,splp/splm, sprp/sprm, with 8 ? / 50pf load ) output power po6-1 spmixg=12db, rl=8 ? ,thd=1% - 1.4 - w po6-2 spmixg=12db, rl=8 ? ,thd=10% - 1.7 - w po6-3 spmixg=12db, rl=4 ,thd=1% 1.5 2.5 - w po6-4 spmixg=12db, rl=4 ? ,thd=10% 2 3 - w total harmonic distortion thd6 po=1w, rl=8 / a-weighted - 62 - db signal to noise ratio snr6 a-weighted - 89 - db power supply rejection ratio psrr6 splvdd / sprvdd on 100mvp-p,1khz ripple - 72 - db hvdd1 on 100mvp-p,1khz ripple - 80 - db class d oscillator frequency (am avoidance) oscillator frequency am0 ama[1:0]=0b00 360 400 440 khz am1 ama[1:0]=0b01 450 500 550 khz am2 ama[1:0]=0b10 540 600 660 khz
datasheet datasheet 9/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15? 001 am3 ama[1:0]=0b11 630 700 770 khz microphone bias (micbias-pin) output noise voltage vmicn7 22hz to 22khz, vmic =1.67 x regout/2 - 5 - v power supply rejection ratio psrr7 hvdd1 on 100mvp-p,1khz ripple load=1ma - 80 - db
datasheet datasheet 10/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15? 001 ac characteristics clock pll not use (dgnd=0v, iovdd=3.3v, hvdd1=3.3v,ta=25c) parameter symbol min max. unit mclki frequency fc 2.048m 49.152m hz mclki period tc 1/fc 1/fc s mclki length tch tc*0.4 - s mclki length tcl tc*0.4 - s pll use (external loop back filter not used) (dgnd =0v, iovdd=3.3v, hvdd1=3.3v, ta=25c) parameter symbol min max. unit mclki frequency fc 2m 54m hz mclki period tc 1/fc 1/fc s mclki length tch tc*0.4 - s mclki length tcl tc*0.4 - s pll use (external loop back filter used) (dgnd =0v, iovdd=3.3v, hvdd1=3.3v, ta=25c) parameter symbol min max. unit mclki frequency fc 32k 2m hz mclki period tc 1/fc 1/fc s mclki length tch tc*0.4 - s mclki length tcl tc*0.4 - s mclki tc, fc tch tcl figure 6.
datasheet datasheet 11/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15? 001 reset (dgnd =0v, iovdd=3.3v, hvdd1=3.3v, ta=25c) parameter symbol min max. unit resetb pulse width tw_rst 5 - s resetb tw_rst figure 7. when reset pin is made low level, internal ldo is power down mode. it is necessary for 1ms until regout pin becomes low le vel. the recommendation of tw_rst is 1ms over. 2 wire serial interface (dgnd =0v, iovdd=3.3v, hvdd1=3.3v, ta=25c, cl=30pf) parameter symbol standard mode fast mode unit min max. min max. scl frequency f scl - 100 - 400 khz scl ?l? length t low 4.7 - 1.3 - s scl ?h? length t high 4.0 - 0.6 - s hold time under repeat [start] condition t hd:sta 4.0 - 0.6 - s setup time under repeat[start] condition t su:sta 4.0 - 0.6 - s data hold time t hd:dat 0 3.45 0 0.9 s data setup time t su:dat 250 - 100 - ns setup time under [stop] condition t su:sto 4.0 - 0.6 - s figure 8. sda t hd:dat t low t high t su:dat t su:sto t su:st a scl t hd:sta
datasheet datasheet 12/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15? 001 3 wire serial interface (dgnd=0v, iovdd=3.3v, hvdd1=3.3v, ta=25c, cl=30pf) parameter symbol min max. unit sclk low to chip select enable tslcl 100 - ns chip select enable to sclk low tclsl 100 - ns chip select enable to sclk high tclsh 100 - ns sclk high to chip select enable tshcl 100 - ns sclk high pulse width tsh 50 - ns sclk low pulse width tsl 50 - ns input data setup time tids 30 - ns input data hold time tidh 30 - ns sclk last edge to chip select disable tchs2 100 - ns chip select high pulse width tch 100 - ns output data valid todv - 40 ns chip select high to data transition tchdts - 40 ns two kinds of timing is supported depends on the sclk pin level at data transfer start. read or write is selected by lsb level of index. figure 9. csb sdata sclk sclk sdata
datasheet datasheet 13/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15? 001 serial audio interface (slave) (dgnd=0v, iovdd=3.3v, hvdd1=3.3v, ta=25c, cl=30pf) parameter symbol min max. unit sai_bclk period tc_bclk 32fs 128fs hz sai_bclk ?h? length thw_bclk 73 - ns sai_bclk ?l? length tlw_bclk 73 - ns sai_lrclk hold time th_lrclk 20 - ns sai_lrclk setup time tsu_lrclk 20 - ns sai_sdout delay time td_sdo (note1) - 80 ns sai_sdin setup time tsu_sdi 20 - ns sai_sdin hold time th_sdi 20 - ns (note1) td_sdo is the delay time from later one of sai_bclk transition and sai_lrclk transition. lrclk bclk sdout tc_bclk tsu_lrclk th_lrclk td_sdo thw_bclk tlw_bclk sai transmit figure 10. lrclk bclk sdin tc_bclk tsu_lrclk th_lrclk tsu_sdi th_sdi thw_bclk tlw_bclk sai receive figure 11.
datasheet datasheet 14/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15? 001 power supply sequence please power on/off the lsi with all kind of power at the same time. each power supply should power up/down in 50ms.also keep all power supply in the on state or the off state. please avoid partial on or partial off states.don? t have to keep the sequence of power on/off please keep resetb pin ?l? level until all power supply becom e on state. the cpu i/f available when all power supply are powered on, exceed tw_purst, reset are disabled and exceed tw _regu . it is regardless that turn of power on and off of iovdd and hvdd. parameter symbol min typ max unit power on delay time t vdd_on 0 - 50 ms power down delay time t vdd_off 0 - 50 ms reset time after power on t w_purst 1 - - s wait time for regulato r starting after reset release t w_regu 1 - - ms iovdd power suppl y t vdd_on powersupply*0.9 powersupply*0.9 t vdd_off not available available not available cpu i/f resetb other power suppl y vdd off operation vdd off status powerdown wait regulator t w_regu powersupply*0.1 powersupply*0.1 regout t w_purst figure 12.
datasheet datasheet 15/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15? 001 function description clock control main modules that make up sound path of the lsi inside operate with 256fs audio clock. audio clock can be selected whether divided clock of 256fs/512fs/1024fs from mclki or generated clock from audio pll. in case of used external loop filter of pll, input clock must be 2mhz to 54mhz frequency. in case of not used external filter of pll, input clock must be 32 khz to 2mhz frequency. it is po ssible to select internal clock either mclki port or lrclk port or bclk port. internal clock is selected clock input/ou tput control register. these frequency mean 512fs and master clock is divided by 2 from pll output when sampling frequency is 16 khz to 24 kh z, and these frequency mean 1024fs and master clock is divided by 4 from pll output when sampling frequency is 8 khz to 12 khz. ?? pll condition setting (changing) sequence 1. stop pll output by setting plloe bit to ?0? 2. disable pll by setting pllen bit to ?0? 3. set fpllm, fppnl, fpllnh, fplld, fpllfl, fpllfh, fpllfdl, fpllfdh 4. set pllen bit to ?1? 5. wait for the pll stabilizing time as the table ?pll stabilizing time? 6. set plloe bit to ?1? 7. start recording or playback. pll stabilizing time pll stabilizing time 10msec - related register sampling rate setting register fpllm, fppnl, fpllnh, fplld, fpllfl, fpllfh, fpllfdl, fpllfdh register clock enable register clock input/output c ontrol register
datasheet datasheet 16/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15? 001 when pll is used. the lsi support audio pll function that ca n generate precise audio clock from wide range of clock frequency. then, it can be realize audio function without external clock gener ator for audio. the lsi supports following cases. case 1: pllisel=0 or 2, mst=0, mclkoe=0 audio pll generate system clock as 256fs from lrclk figure 13. cpu bu26156 lrclk bclk sdin sdout mclki cpu cpu bu26156 lrclk bclk sdin sdout mclki bu26156 lrclk bclk sdin sdout mclki
datasheet datasheet 17/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 when pll is not used. please generate audio clock on the cpu and supply to t he lsi when pll is not used. then cpu and the lsi are synchronized. case 2: mst=?0?, mclkoe=?0? audio clock is generated by the cpu and supplied to mclki pi n of the lsi. lrclk and bclk are also provided from the cpu. figure 14. cpu bu26156 lrclk bclk sdin sdout mclki clock cpu cpu bu26156 lrclk bclk sdin sdout mclki bu26156 lrclk bclk sdin sdout mclki clock
datasheet datasheet 18/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 serial audio interface the lsi supports sai formats. wsli=?0?, dlyi=?0?, fmti=?0? figure 15. wsli=?1?, dlyi=?0?, fmti=?0? figure 16. wsli=?0?, dlyi=?1?, fmti=?0? figure 17. wsli=?1?, dlyi=?1?, fmti=?0? figure 18. 1 2 3 16 1 2 3 16 left left right sai_ lrclk sai_sdin sai_sdout sai_bclk msb 2sb 3sb l s b msb 2sb 3sb l s b msb 2sb 3sb right 1 2 3 16 1 2 3 16 left left msb 2sb 3sb l s b msb 2sb 3sb l s b msb 2sb 3sb sai_ lrclk sai_sdin sai_sdout sai_bclk left msb 2sb 3sb l s b right 1 2 3 16 1 2 3 16 left msb 2sb 3sb l s b msb 2sb 3sb sai_ lrclk sai_sdin sai_sdout sai_bclk 1 2 3 16 1 2 3 16 left right left msb 2sb 3sb l s b msb 2sb 3sb l s b msb 2sb 3sb sai_ lrclk sai_sdin sai_sdout sai_bclk
datasheet datasheet 19/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 dlyi=?0?, fmti=?1? flame synchronous transfer mode: r channel data is transferred right after l channel data. figure 19. dlyi=?1?, fmti=?1? flame synchronous transfer mode: r channel data is transferred right after l channel data. figure 20. - related register sai transmitter control register sai receiver control register right 1 2 3 16 1 2 3 16 left left msb 2sb 3sb l s b msb 2sb 3sb l s b msb 2sb 3sb sai_ lrclk sai_sdin sai_sdout sai_bclk 1 2 3 16 1 2 3 16 left right left sai_ lrclk sai_sdin sai_sdout sai_bclk msb 2sb 3sb l s b msb 2sb 3sb l s b msb 2sb 3sb
datasheet datasheet 20/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 2 wire serial interface this lsi has 2 wire serial interfaces. the lsi operates as a slave device. the address is fixed at ?0011010?. - format the followings are the protocol of the lsi. write (msb first) start condition (set sda level from ?h? to ?l? during scl=?h?) slave address (0011010) +w (0) (8bit) write address (8bit) write data (8bit) ? stop condition ( set sda level from ?l? to ?h? during scl=?h?) read (msb first) start condition slave address (0011010) +w (0) (8bit) read address (8bit) (stop condition) start condition slave address (0011010) +r (1) (8bit) read data (8bit) the following shows the wave form of the lsi. the yellow gridding shows that slave device drives the bus. the symbol in the wave form means as following table. unit description w/r 0: write 1: read a 0: ack(acknowledge) 1: nak(not acknowledge) a[7-0] address (8bit) d[7-0] data(8bit) write a scl start sda 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 0 continued from the above 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 0 8 1 2 3 4 5 6 7 sto p 0 slave address reception a ccess address reception write data reception write data reception write data reception write data reception 0 w a 7 a6 a5 a 4 a 3 a 2 a 1 a 0 a d 7 d 6 d 5 d 4 d 3 d 2 d1 d 0 0 1 1 0 0 1 a a a a a internal write d 7 d 6 d 5 d 4 d 3 d 2 d1 d 0 d 7 d 6 d 5 d 4 d 3 d 2 d1 d 0 d 7 d 6 d 5 d 4 d 3 d 2 d1 d 0 internal write internal write figure 21. in case there is no stop or start condition after internal regi ster is written (above figure: internal write), the slave device becomes continuous write mode and the next received 8 bits of data will be written into the internal register addressed by incremented by two to the current address.
datasheet datasheet 21/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 read s tar t scl sda 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 0 sta r t a internal read 1 2 3 4 5 6 7 8 0 slave address reception a ccess address reception slave address reception read data transmission read data transmission s r 0 w a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 a a a 0 1 1 0 0 0 1 1 continued fr om the above 0 1 0 1 0 a d7 d6 d5 d 4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 internal read figure 22. if the master device returns ack (acknowledge) after the 8 bi t data transferred from the lsi becomes continuous read mode. the next received 8 bits of data will be read from the internal register addressed by incremented by two to the current address.
datasheet datasheet 22/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 analog block gain diagram figure 23. splm splp sprm sprp hpoutr hpoutl lrclk bclk sdin sdout lin2r lin1r lin2l lin1l minm minp serial audio interface lin3r lin3l adc dac mic input malcmxgain (0xbe/0xbf) 0 +35.25db / 0.75db step malc on/off malcen (0xba/0xbb) limit level 0dbv ( =1vrms)fixed adc input full scale level line input lalcmxgain (0xc8/0xc9) -9.0 +6.0db / 0.75db step lalc on/off lalcen (0xc4/0xc5) limit level 0dbv ( =1vrms)fixed adc input full scale level adc dac vol vol mixvol spvol (0x3a/0x3b) -56 +6.0db speaker output spmixg(0x52/0x53) 0 / +6 / +12 / +18db (analog) (digital) 0dbv 0dbfs (digital) (analog) 0dbfs 0dbv vol vol line output hpvol ([mapcon1]0x36/0x37) -6 / 0 / +3 / +6db vol vol ab/d ab/d hp hp beep input 0db beepin splm splp sprm sprp hpoutr hpoutl lrclk bclk sdin sdout lin2r lin1r lin2l lin1l minm minp serial audio interface serial audio interface lin3r lin3l adc adc dac dac mic input malcmxgain (0xbe/0xbf) 0 +35.25db / 0.75db step malc on/off malcen (0xba/0xbb) limit level 0dbv ( =1vrms)fixed adc input full scale level line input lalcmxgain (0xc8/0xc9) -9.0 +6.0db / 0.75db step lalc on/off lalcen (0xc4/0xc5) limit level 0dbv ( =1vrms)fixed adc input full scale level adc adc dac dac vol vol vol vol mixvol spvol (0x3a/0x3b) -56 +6.0db speaker output spmixg(0x52/0x53) 0 / +6 / +12 / +18db (analog) (digital) 0dbv 0dbfs (digital) (analog) 0dbfs 0dbv vol vol vol vol line output hpvol ([mapcon1]0x36/0x37) -6 / 0 / +3 / +6db vol vol vol vol ab/d ab/d ab/d ab/d hp hp hp hp beep input 0db beepin
datasheet datasheet 23/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 state transition regarding sai input and output control. the following shows state transition about sound control. a change state is carried out by recplay bit setup. figure 24. (1) stop state (recplay=0x0) sound activity is stopped. (2) [adc sai] state (recplay =0x1) analog input signal (mic input/line input) is convert ed to digital data and outputted from sai terminals. (3) [sai dac] state (recplay =0x2) digital signal from sai is converted to analog data and it is outputted from speaker or line amplifier. (4) [adc dac] state (recplay =0x7) analog input signal (mic input/line input) is converted to digi tal data and outputed speaker or line amplifier through dac. (5) [adc dac & sai] state (recplay =0x3) analog input signal (mic input/line input) is converted to digital data and outputed from sai terminals. at one time, digital signal inputted from sai is converted to analog data and it is outputted from speaker or line amplifier. set this state for using sdin to sd out path when lindacen bit enable. *please don?t use ?dac output to limix path? with path (4) and path (5). stop state [sai dac]state [adc dac]state [adc dac&sai]state [adcsai] state 0x0 0x1 0x2 0x3 0x7
datasheet datasheet 24/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 signal flow adc used signal flow figure 25. name function related register setting mic alc micvol analog microphone volume and alc mic alc control mic alc max gain analog input power management 0db to +35.25db, 0.75db step linein alc linvol analog line input volume and alc line alc control line alc max gain analog input power management -15 to +0db, 1db step lin mix mixing the line input, mic input and outputted signal from dac line in control analog path control analog input control.from mic, line and dac. mixing control adc 24bit ad converter analog input power management adc enable/disable l/r select adc(lch/rch) to audio bass [ i2sl / i2sr / monorec] record l/r balance volume control -6.0db to 6.0db(0.1step) hpf1 high path filter for dc cut dsp filter function e nable hpf enable/disable l/r balance l/r bal ance volume control [ rbvoll / rbvolr ] record l/r balance volume control -6.0db to 6.0db(0.1step) hpf2 high pass filter for adc dsp filter function enable high pass filter2 cut-off control hpf enable/disable setting order setting cut-off frequency setting filter sound filters setting sound effect mode dsp filter function enable eq band n gain setting programmable eq band n coeffeicient-a0/1 sound effect mode setting. each filters enable/disable. each filter gain settings. each sound effects characteristics setting lpf programmable lpf setting for adc rec programmable lpf setting rec programmable lpf cutoff coef lpf enable/disable setting order setting. cut-off frequency setting ralcvol digital boost volume for adc recording digital boost volume register -12.000d to 35.625db(0.375step) rdvol digital attenuator and fader for adc record digital attenuator control digital volume control function enable mixer & volume control volume setting -71.5db to 0db (0.5dbstep) fader enable/disenable setting (working together dvmute) *filter block can be used for either adc path or dac path. for example, if filter block is connected to dac, adc is not effected by filter. regarding the detail of register setting, pleas e refer to selection of [semode] register. adc hpf1 l/r balance hpf2 *1 filter lpf *1 rdvol serial audio if dv mute *1 exclusive use malc lalc from mic from line mic vol lin vol filter block lin mix l/r select from dac ralc vol adc hpf1 l/r balance hpf2 *1 filter lpf *1 rdvol serial audio if dv mute *1 exclusive use malc lalc from mic from line mic vol lin vol filter block lin mix l/r select from dac ralc vol
datasheet datasheet 25/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 dac used singal frow figure 26. name function related register setting l/r mix lch/rch mixer for sai input signal mixer & vo lume control mixer setting effect vol digital volume in front of sound effect blocks. playback effect volume -71.5db to 0db (0.5dbstep) stereo enhancer stereo enhancer. stereo gain 3d effect filter each sound filters are enabled. sound effect mode dsp filter function enable eq band n gain setting programmable eq band n coeffeicient-a0/1 sound effect mode setting. each filters enable/disable each filters gain setting each sound effects characteristics setting lpf programmable lpf for dac path. play programmable lpf setting play programmable lpf cutoff coef hpf enable/disable setting order setting cut-off frequency setting palc palcvol digital playback alc and volume playback alc attack time control playback alc decay time control playback target level control playback alc min gain control playback alc volume control playback alc zerocross timeout playback limiter fast release setting alc operation settings pdatt digital attenuator for dac path. fader for noise reduction at changing the digital volume playback digital attenuator control digital volume control function enable mixer & volume control volume setting -71.5db to 0.5db (0.5dbstep) fader on/offsetting fade time setting soft clip softclip limiter for output suppression soft clip enable soft clip threshold soft clip gain softclip enable/disable threshold level, gain setting dac 24bit da converter dac po wer management dac enable/disable mix1 mixing dac output and analog input. speaker amplifier output control 2 gain setting mixing paths setting spvol analog volume for dac to analog output path. speaker amplifier volume control amplifier volume fader control amplifier volume control function enable volume setting -54 to +6db fader on/off setting fade time setting spmixg analog volume for speaker output path speak er amplifier output control 1 gain setting mix2 mixing speaker output signal and beepin input signal. spamp input control beepin amp control mixing paths setting mix3 mixing headphone output signal and beepin input singlal. spamp input control beepin amp control mixing paths setting hpvol analog volume for headphone output path headphone output gain setting gain setting *filter block can be used for either adc path or dac path. for example, if filter block is connectd to dac, adc is not effcetd by filter. regadrding the detail of register setting, pleas e refer to selection of [semde] register. dac pdatt lpf filter effect vol l/r mix serial audio if dv mute stereo enhancer av mute to speaker to headphone filter block soft clip mix1 spvol from mic from line *1 exclusive use palc vol palc to lin mix mix2 mix3 spmixg from beepin spmute *2 hpvol *2 class-d only dac pdatt lpf filter effect vol l/r mix serial audio if dv mute stereo enhancer av mute to speaker to headphone filter block soft clip mix1 spvol from mic from line *1 exclusive use palc vol palc to lin mix mix2 mix3 spmixg from beepin spmute *2 hpvol *2 class-d only
datasheet datasheet 26/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 filter (5bands-programmable iir filter) a five bands equalizer features a second-order iir type band pass filter. volume control of mute, -71.5db+12db (0.5db step) can be controlled at all paths. each channels of the filter can be select ed parallel connection or serial connection the followings are block diagrams at parallel connection and serial connection parallel connection serial connection figure 27. figure 28. the filter coefficient is programmable. from required center frequency and band wi dth, programmable equalizer coefficient-a0 control register and programmable notch filter coefficient-a1 control register value is decided. followings are the setting formula. a0 = (1 - tan f b /fs) / (1 + tan f b /fs) a1 = - 2cos2 f 0 /fs / (1 + tan f b /fs) f0: band center frequency [hz] fb: -3db band width [hz] fs: sampling frequency [hz] * actual setting value is an integral number t hat the result of above formula multiplied by 2 14 then round up numbers of five and above and round down anything under five to an integer. dsp filtering function: on / off dsp filter function enable register can set on or off of each filter function. please chan ge this register when recplay bit is 0x0. if this register is changed on play back or recording, the noise may be generated. stereo enhancer please refer the application note ?s tereoenhancerapplicationnote??. band0 - iir input output coefficient(a0, a1)5ch gain5ch b and1 - iir b and3 - iir b and2 - iir b and4 - iir input output coefficient(a0, a1)5ch gain5ch band0 - iir band1 - iir band2 - iir band4 - iir band2 - iir
datasheet datasheet 27/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 palc (alc fo dac path) function outline the palc adjust a gain automatically from -12db to 35.625db in dac path. a small level singal is made easy listening because the small level signal is amplified to a target level and dynamic range is compressed when the gain setting is a plus gain or palc can be used for a limiter when the gain setting is a minus gain. it protects a speaker from destruction. fast release function makes play sound natural by it release the gain fast when a big singal is suddenly input and a volume drops. operation outline when output waveform level of alc is under the target level, output waveform is increased. maximum level of gain is malcmxgain or lalcmxgain. maximum alc gain is palcvol and minimum level is palcmingain. palcatkc is attack time. it is a time step of decreasing wave form level. palcdcy is decay time. it is a time step of increasing waveform level. these operations are the following. *note:when alc is disable, output signal is also amplified to palcvol gain level. figure 29. input signal maximum gain (palcvol) palc gain palc output target level (palclvl) attack time cycle (palcatk) decay time cycle (palcdcy) minimum gain (palcmingain)
datasheet datasheet 28/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 a peak limiter function is carried in alc. the peak limi tter function short attack time and prevent clipping a wave. a threshold level is fixed at 87.5%(-1.16dbfs) and this func tion is priored the normal alc operation when input level exceed the threshold level. the attack time is a mini mum step, 1/fs, when the peak limiter operates. and this function cannot be turned off. these operations level diagram is the following figure. input (db) output (db) alclvl peak limiter=-1.16dbfs 0d bfs figure 30. alc level diagram zero cross bu26156 combined zerocross function for malc, lalc. zerocross is changed, when input waveform is crossed center level. in case of zero cro ss function is not occurred, bu26156 changes gain when time set by palczctm is passed bu26156 also changes gain past that time when zerocross is enable (zcen=0x0). it is often caused pop noise to change gain without zero cross. alcatk alcatk gain changing at zerocross output signal alc gain alcatk alczctm figure 31. note:it is possible that a noise of changi ng the gain occur when zcen is disable.
datasheet datasheet 29/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 fast release in case of input impulse waveform is over target level of alc, fast release function detects impulse waveform and lsi is returned until normal wave form level quickly. as result of quick return, output waveform of lsi is kept natural sound. -4 -3 -2 -1 0 1 2 3 4 0 10 20 30 40 50 60 70 80 90 10 0 11 0 120 figure 32. not fast release waveform and fast release waveform palcfren bit is setted enable of fast release function. when impulse waveform is over threshold of palcfrth level, fast release function is started and is retur ned waveform until detected level by fast release decay time. this decay time is selected palfrsp bit. waveform is low level not use fast release a ttack return to normal release a ttack release time of fast release quick return from low level waveform input waveform output waveform inpulse waveform output waveform
datasheet datasheet 30/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 malc (mic input alc)/l alc (line input alc) function general description malc can be adjusted mic input gain from 0db to +35.25db. lalc can be adjusted line input gain from -15db to 0db. operation general description malc and lalc are fixed adc full-scale level. when output waveform level of alc is under the target level, output waveform is increased. maximum level of gain is malcmxga in or lalcmxgain. minimum level of gain is 0db, when malc is used. minimum level of gain is -15db, when lalc is used. malcatk and lalcatk are attack time. it is a time step of decreasing waveform level. malcdcy and lalcdcy is decay time. it is a time step of increasing waveform level. these operations are the following. * in case of malc, lalc are disabled, output waveform is effective malcmxgain and lalcmxgain setting gain. figure 33. zero cross bu26156 combined zerocross function for malc, lalc. zerocross is changed, when input waveform is crossed center level. in case of zero cross function is not occurred, bu26156 is changed gain after 2.7ms @fs=48 khz. clip reduction clip reduction function prevents clip waveform. when bu26156 is entered large waveform, bu26156 is shorted attack time. as result of this operaiontion, output waveform is prevented clip waveform. when this function is enabled, attack time is fixed 2fs and zerocross is disabled. the difference between peak limiter and clip reduction is threshold and attacktime. threshold of clip deduction is adc full scale level. attack time of clip reduction is 2fs. it is possible to select on/off register setti ng. input waveform maximum gain (malcmxgain /lalcmxgain) malc/lalc gain malc/lalc output target level (fix to adc full-scale level) attack time period (malcatk/lalcatk) minimum gain (fix to malc=0db /lalc=-15db)
datasheet datasheet 31/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 soft clip limiter soft clip function is reduced power comsumption. if alc can not be responded to input waveform, soft clip function is reduced input waveform. in case of input waveform is over ed threshold level, soft clip reduce output waveform. out in 0x000000 0xffffff scgain=1 scgain=2 scgain=1/2 scgain=1/4 scgain=1/64 soft clip threshold (scthrh, schtrm, schtrl) soft clip gain (scgain) ? out in 0x000000 0xffffff scgain=1 scgain=2 scgain=1/2 scgain=1/4 scgain=1/64 soft clip threshold (scthrh, schtrm, schtrl) soft clip gain (scgain) ? figure 34.
datasheet datasheet 32/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 analog block analog reference voltage (v mid) generation circuit vmid is used as analog circuit reference voltage for both reco rding path and playback path. therefore, both case for recording and playback, vmid need to do power up. at the power up, the wait time in proporti on to the capacitor value is needed to charge external capacitor connected with vmid pin. if recording and playback start before completion of charge, it may generate noise. the following is a sequence of recommend ation. refer to the analog reference power management register for the f unction of vmidcon. vmid power up/down sequence (external capacitor 1uf) power up power down 1/2 regout level vmid ( 0v ) vmidcon record or playback power down power down charge time min 5ms 0x0 0x1 0x2 0x0 min 5ms figure 35. interrupt circuit it is possible to check bu26156 operation by irq port. irq por t polarity is changed by thermal protection operation and speaker short protection operation. iit is possible to ma sk interrupt function and sele ct irq interrupt polarity. in case of bu26156 detects protection operation, bu26156 keeps interrupt status. in case of clear interrupt status, write to ?1? to status register. irqb teminal outputs ?l? level during resetb equal ?l? leve l (reset state). please mask irqb signal in this period resetb irqb valid min: 1ms figure 36.
datasheet datasheet 33/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 detailed description of the registers register map note: ?-? indicates a reserved bit. they retu rn ?0? for reads. write ?0? to the bit ev ery time. if ?1? is written to this bit, the operations cannot be guaranteed. don't write the registers expect the map of below. if these register is writte n, the operations cannot be guaranteed. about the register initial setting after starting this ic after starting register access, according to foll owing procedures at start-up, access register. address (hex) read/write write data (hex) description 1c write 01 mapcon 1 39 write 00 for adc parameter setting 3b write 01 for adc / mic parameter setting 3d write 02 for adc parameter setting 1c write 00 mapcon 0
datasheet datasheet 34/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 it is available at the mapcon=0x0(register map control register 0x1c/0x1d) R? register map control ? 0x1c/0x1d mapcon=0x0 ???? b07 b06 b05 b04 b03 b02 b01 b00 register name note r w (initial) 0x00 0x01 ---- sampling ----0000 rate setting 0x06 0x07 - stereo gain -0100000 0x08 0x09 irqpole - - - - shliren shriren thriren irq control 0----000 0x0a 0x0b - - - - - shlsts shrsts thrsts irq status -----000 0x0c 0x0d - - - - mclkoe plloe pllen mclken clock enable ----0000 0x0e 0x0f --- clock input/output ---00000 control 0x10 0x11 -------softrstsoftware reset -------0 0x12 0x13 - - - - - record/playback - - - - - 0 0 0 running control 0x14 0x15 -- mic input charging --000000 time 0x1c 0x1d -------mapcon registermap -------0 control 0x20 0x21 loren lolen losel - - micben analog reference power 000--000 management 0x22 0x23 - - - - pgaen adcren adclen lien analog input power ----0000 management 0x24 0x25 - - - - - dacren daclen - dac power -----00- management 0x26 0x27 - - - - - spden spaben spmven speaker amplifier power -----000 management 0x2a 0x2b test2 - bp2spen mv2spen test1 test0 am avoidance control / 0-011111 spamp input control 0x2e 0x2f - - - - - - zcen - zero cross cmparator ------0- power management 0x30 0x31 - - - test3 beepin amp control / ---00100micbias voltage control 0x32 0x33 - - mxgain linmxen micmxen lin3en lin2en lin1en line-in control --010001 0x3a 0x3b -- speaker amplifier volume --110011 control 0x3e 0x3f playback 1 1 1 1 1 1 1 1 digital attenuator control 0x48 0x49 ------avmuteavfadeamplifier volume control - - - - - - 0 0 function enable 0x4a 0x4b ----- amplifier volume -----000 fader control 0x4c 0x4d fmto msbo isscko afoo dlyo wslo sai transmitter 11000000 control 0x4e 0x4f fmti msbi isscki afoi dlyi wsli sai receiver 11000000 control 0x50 0x51 ---bswp---mst sai mode ---0---0 select 0x52 0x53 ------ speaker amplifier ------00 output control1 0x54 0x55 ----linoemicoedacoelomixg s peaker amplifier / lineout amplifier ----0000 output control2 0x58 0x59 -- ---- dac clock setting --00---- 0x5a 0x5b ------mindif- mic interface ------1- control 0x5c 0x5d semode - - - - sound effect mode 0----000 0x5e 0x5f ------i2sri2sl record path ------00 select 0x60 0x61 record 1 1 1 1 1 1 1 1 digital attenuator control 0x62 0x63 playback 11111111 effect volume control effect vol rdvol spmixg osrsel semode avfcon pcmfo24 pcmfi24 pdatt spvol vmidcon ama bpincon micbcon18s mctime pllisel clksel recplay stegain index sr
datasheet datasheet 35/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 b07 b06 b05 b04 b03 b02 b01 b00 register name note r w (initial) 0x66 0x67 hpf2od eq4en eq3en eq2en eq1en eq0en hpf2en hpf1en dsp filter function 00000001 enable 0x68 0x69 - - - dvmute dvfade - - palcen digital volume control - - - 0 0 - - 0 function enable 0x6a 0x6b mixer & volume 00000000 control 0x74 0x75 eq band0 11100111 gain setting 0x76 0x77 eq band1 11100111 gain setting 0x78 0x79 eq band2 11100111 gain setting 0x7a 0x7b eq band3 11100111 gain setting 0x7c 0x7d eq band4 11100111 gain setting 0x7e 0x7f ----- high pass filter2 -----000 cut-off control 0x80 0x81 programable equalizer band0 0 0 0 0 0 0 0 0 coefficient-a0 (l) 0x82 0x83 programable equalizer band0 0 0 0 0 0 0 0 0 coefficient-a0 (h) 0x84 0x85 programable equalizer band0 0 0 0 0 0 0 0 0 coefficient-a1 (l) 0x86 0x87 programable equalizer band0 0 0 0 0 0 0 0 0 coefficient-a1 (h) 0x88 0x89 programable equalizer band1 0 0 0 0 0 0 0 0 coefficient-a0 (l) 0x8a 0x8b programable equalizer band1 0 0 0 0 0 0 0 0 coefficient-a0 (h) 0x8c 0x8d programable equalizer band1 0 0 0 0 0 0 0 0 coefficient-a1 (l) 0x8e 0x8f programable equalizer band1 0 0 0 0 0 0 0 0 coefficient-a1 (h) 0x90 0x91 programable equalizer band2 0 0 0 0 0 0 0 0 coefficient-a0 (l) 0x92 0x93 programable equalizer band2 0 0 0 0 0 0 0 0 coefficient-a0 (h) 0x94 0x95 programable equalizer band2 0 0 0 0 0 0 0 0 coefficient-a1 (l) 0x96 0x97 programable equalizer band2 0 0 0 0 0 0 0 0 coefficient-a1 (h) 0x98 0x99 programable equalizer band3 0 0 0 0 0 0 0 0 coefficient-a0 (l) 0x9a 0x9b programable equalizer band3 0 0 0 0 0 0 0 0 coefficient-a0 (h) 0x9c 0x9d programable equalizer band3 0 0 0 0 0 0 0 0 coefficient-a1 (l) 0x9e 0x9f programable equalizer band3 0 0 0 0 0 0 0 0 coefficient-a1 (h) 0xa0 0xa1 programable equalizer band4 0 0 0 0 0 0 0 0 coefficient-a0 (l) 0xa2 0xa3 programable equalizer band4 0 0 0 0 0 0 0 0 coefficient-a0 (h) 0xa4 0xa5 programable equalizer band4 0 0 0 0 0 0 0 0 coefficient-a1 (l) 0xa6 0xa7 programable equalizer band4 0 0 0 0 0 0 0 0 coefficient-a1 (h) 0xac 0xad - -0100000record alc volume control 0xae 0xaf - - - - - - - rppl recplay play limitter enable -------0 0xb0 0xb1 -------scen soft clip enable -------0 0xb2 0xb3 - soft clip threshold h -0000000 sct hrh ralcvol eq4a1h eq4a1l eq4a0h eq4a0l eq3a1h eq3a1l eq3a0h eq3a0l eq2a1h eq2a1l eq2a0h eq2a0l eq1a1h eq1a1l eq1a0h eq1a0l eq0a1h eq0a1l eq0a0h hpf2cut eq0a0l eqgain4 eqgain3 eqgain2 eqgain1 rmcon lmcon eqgain0 index dvfcon
datasheet datasheet 36/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 b07 b06 b05 b04 b03 b02 b01 b00 register name note r w (initial) 0xb4 0xb5 soft clip threshold m 00000000 0xb6 0xb7 soft clip threshold l 00000000 0xb8 0xb9 ----- soft clip gain -----001 0xba 0xbb ------mclenmalcenmic alc control ------11 0xbc 0xbd - - mic alc attack /decay time -100-100 0xbe 0xbf -- mic alc max gain --010000 0xc4 0xc5 ------lclenlalcenline alc control ------00 0xc6 0xc7 - - line alc attack /decay time -111-100 0xc8 0xc9 ---- line alc max gain ----1111 0xdc 0xdd - - - - playback alc note1 ----0100 attack time control 0xde 0xdf - - - - playback alc note1 ----0101 decay time control 0xe0 0xe1 --- playback alc note1 ---11011 target level control 0xe2 0xe3 - - - - - playback alc note1 -----000 min gain control 0xe4 0xe5 - playback alc note1 -0100000 volume control 0xe6 0xe7 ------ playback alc zerocrossnote1 ------00 timeout 0xea 0xeb palcfren - playback limiter note1 00010-01 fast release setting 0xec 0xed -- -- power up --0000-- control lopwtim palczctm palcfrth palcfrsp palcmingain palcvol palcdcy palclvl lalcmxgain palcatk lalcdcy lalcatk malcmxgain scgain malcdcy malcatk scthrl index scthrm
datasheet datasheet 37/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 it is available at the mapcon=0x1(register map control register 0x1c/0x1d) b07 b06 b05 b04 b03 b02 b01 b00 register name note r w (initial) 0x02 0x03 ----- fpll m setting -----000 0x04 0x05 fpll n setting(l) 00000000 0x06 0x07 -------fpllnhfpll n setting(h) -------0 0x08 0x09 --- fpll d setting ---00000 0x0a 0x0b fpll f setting(l) 00000000 0x0c 0x0d fpll f setting(h) 00000000 0x0e 0x0f fpll f_d setting(l) 00000000 0x10 0x11 fpll f_d setting(h) 00000000 0x12 0x13 ---- fpll v setting ----0000 0x16 0x17 - - - cpmode - - - - pll cpmode setting ---0---- 0x1c 0x1d -------mapcon registermap -------0 control 0x36 0x37 ------ hp output gain setting ------00 0x3e 0x3f - - half hpbpen lindacen analog path control --100111 0x74 0x75 - record l balance -1000000 volume control 0x76 0x77 - record r balance -1000000 volume control 0x86 0x87 - - - - - - steen steod stereo enhancer ------00 control 0x88 0x89 stereo enhancer lpf1 00000000 coefl 0x8a 0x8b stereo enhancer lpf1 00000000 coefh 0x8c 0x8d stereo enhancer lpf2 00000000 coefl 0x8e 0x8f stereo enhancer lpf2 00000000 coefh 0xa0 0xa1 - - - - - - plpfod plpfen play programable lpf ------00 setting 0xa2 0xa3 play programable lpf 00000000 coef (l) 0xa4 0xa5 play programable lpf 00000000 coef (h) 0xa6 0xa7 ------rlpfodrlpfenrec programable lpf ------00 setting 0xa8 0xa9 rec programable lpf 00000000 coef (l) 0xaa 0xab rec programable lpf 00000000 coef (h) rlpfc0h rlpfc0l plpfc0h plpfc0l ste2cut[15:8] ste2cut[7:0] ste1cut[15:8] ste1cut[7:0] rblvolr adcset rblvoll fpllv hpvol fpllfdh fpllfdl fpllfh fpllfl fplld fpllm fpllnl inde x
datasheet datasheet 38/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 detailed description of the registers note: ?-? indicates a reserved bit. they retu rn ?0? for reads. write ?0? to the bit ev ery time. if ?1? is written to this bit, the operations cannot be guaranteed. don't write the registers expect the map of below. if these register is written, the operations cannot be guaranteed. ?*? indicates that the register value is ef fective immediate without internal clock. sampling rate setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x00 0x01 - - - - ----0000 index sr this register is to set the sampling rate of recording and playback. please change this register value at recording and playback operation stop ($12h/$13h: recplay=0h). sr [3:0] sr [3:0] description 0x0 8 khz 0x1 11.025 khz 0x2 12 khz 0x3 16 khz 0x4 22.05 khz 0x5 24 khz 0x6 32 khz 0x7 44.1 khz 0x8 48 khz stereo gain register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x06 0x07 - - 0100000 index stegain this register is to set the amount of effects of stereo emphasis. please refer to ?stereoenhancerapplicationnote? for the details of setting. stegain[3:0] stegain gain[times] stegain gain[times] stegain gain[times] stegain gain[times] 0x00 0.000 0x10 1.000 0x20 2.000 0x30 3.000 0x01 0.063 0x11 1.063 0x21 2.063 0x31 3.063 0x02 0.125 0x12 1.125 0x22 2.125 0x32 3.125 0x03 0.188 0x13 1.188 0x23 2.188 0x33 3.188 0x04 0.250 0x14 1.250 0x24 2.250 0x34 3.250 0x05 0.313 0x15 1.313 0x25 2.313 0x35 3.313 0x06 0.375 0x16 1.375 0x26 2.375 0x36 3.375 0x07 0.438 0x17 1.438 0x27 2.438 0x37 3.438 0x08 0.500 0x18 1.500 0x28 2.500 0x38 3.50 0x09 0.563 0x19 1.563 0x29 2.563 0x39 3.563 0x0a 0.625 0x1a 1.625 0x2a 2.625 0x3a 3.625 0x0b 0.688 0x1b 1.688 0x2b 2.688 0x3b 3.688 0x0c 0.750 0x1c 1.750 0x2c 2.75 0x3c 3.750 0x0d 0.813 0x1d 1.813 0x2d 2.813 0x3d 3.813 0x0e 0.875 0x1e 1.875 0x2e 2.875 0x3e 3.875 0x0f 0.938 0x1f 1.938 0x2f 2.938 0x3f 3.938
datasheet datasheet 39/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 irq control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x08 0x09 irqpole(*) ----s h l i r e ns h r i r e nt h r i r e n 0- - - -000 index this register controls the in terrupt enable or disable. thriren this bit controls t hermal error interrupt. thriren description 0 if thermal error occurs, interrupt is not generated. 1 if thermal error occurs, interrupt is generated. shriren this bit controls interrupt of left speaker short error. shriren description 0 if left speaker short error occurs, interrupt is not generated. 1 if left speaker short error occurs, interrupt is generated. shliren this bit controls interrupt of right speaker short error. shliren description 0 if right speaker short error occurs, interrupt is not generated. 1 if right speaker short error occurs, interrupt is generated. irqpole this bit specifies polarity of interrupt pin (irqb). irqpole description 0 if interrupt occur, irqb pin output l level. 1 if interrupt occur, irqb pin output h level. irq status register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x0a 0x0b - - - - - shlsts shrsts thrsts -----000 index this register can check the interrupt status. if writing ?1?, state is clearable. thrsts this bit can check thermal error interrupt state. thrsts description 0 no thermal error. 1 thermal error occurred. shrsts this bit can check left speaker short error interrupt status. shrsts description 0 no left speaker short error. 1 left speaker short error occurred. shlsts this bit can check right speaker short error interrupt status. shlsts description 0 no right speaker short error. 1 right speaker short error occurred.
datasheet datasheet 40/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 clock enable register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x0c 0x0d - - - - mclkoe(*) plloe(*) pllen(*) mclken(*) ----0000 index this register controls clock operation. mclken this bit is to set the mclki pin enable or disable. a clo ck is not transmitted to an inside in case of the disable. mclken description 0 mclki pin input disabled. the clock stops at the first input buffer of the mclki pin. 1 mclki pin input enabled pllen this bit is to set the status of pll. pllen description 0 pll power down 1 pll power up at the first, set pll setting registers. after that, set pllen bit to ?1?. plloe this bit is to set the status of pll out put. set this bit to ?1? afte r pll operation has stabilized. also, this bit must be set to ?1? if pll is not used, otherwise internal clock can not be provided. plloe description 0 pll output disable 1 pll output enable mclkoe this bit is to set the status of output signal from mclko pin. mclkoe description 0 normally operation 1 prohibited
datasheet datasheet 41/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 clock input/output c ontrol register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x0e 0x0f - - - - - - 00000 pllisel(*) clksel(*) index this register is to select internal clo ck. it is to use or not use and to create mc lki input or internal clock divided pll. clksel[2:0] these bits are to select the internal clock. clksel[2:0] description 0x0 use pll output clock.(256fs) 0x2 use pll output clock.(512fs) pll output clock is divided by 2 in the lsi. 0x3 use pll output clock.(1024fs) pll output clock is divided by 4 in the lsi. 0x4 256fs external clock from mclki pin input. mclki pin input is directly used in the lsi. 0x6 512fs external clock from mclki pin input. mclk pin input is divided by 2 in the lsi. 0x7 1024fs external clock from mclki pin input. mclk pin input is divided by 4 in the lsi. pllisel[1:0] this bit is to select the input clock to a udio pll. if not use pll, it is to set 0x0. pllisel[1:0] description 0x0 use lrclk input pin 0x1 use mclki input pin 0x2 use bclk input pin software reset register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 00 x 1 00 x 1 1------- softrst(*) -------0 index this register is for software reset. cpu interface and this regi ster are reset by writing softrst bit to ?1?. and then, write ? 0? for releasing reset.
datasheet datasheet 42/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 record/playback running control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x12 0x13 - - - - - -----000 index recplay this register controls sai in put/output for adc and dac. recplay[2:0] this bit controls sai input/output for adc and dac. adc a nd dac can be executed at same time. adc output data can be directly outputed to dac path. and about the transition of sai input/output for a dc and dac, please refer to chapter ?state transition about sound control?. it is prohibited the other direct transition. so it is reco mmended that transition may be changed via sound stop (recplay=0x0). recplay[2:0] description 0x0 sai input/output for adc and dac stop state 0x1 adc enable, sai output state analog input (microphone/line) is converted fr om analog to digital, and transferred through sai. 0x2 dac enable, sai input state. sai received data is converted from digital to analog and output from analog output path (speaker/headphone output). 0x3 adc enable, sai output state and dac enable, sai input state. analog input (microphone/line) is converted fr om analog to digital, and transferred through sai and sai received data is converted from digital to analog and output from analog output path (speaker/headphone output). 0x7 adc enable, sai output st ate and dac enable state. analog input (microphone/line) input is converted from analog to digital, and transferred through sai and this data is converted from digital to analog and output from analog output path (speaker/headphone output).
datasheet datasheet 43/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 mic input charging time register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x14 0x15 - - - - 000000 mctime index this register is to select the wait time for microphone input load charge. the lsi work recording signal are mute when from recplay is changed from 0x0 until mctime. this time contains re quired time of initializing inte rnal circuit that is 40/fs. it must be waited the setting time to start recording or playback. in addition the wait time at starting playback is always 40/fs regardless of the setting value of this register. mctime[5:0] these bits are to set the wait time for mic input charging time at starting recording. the wait time is available 40/fs and 128 /fs to 8064/fs every 128fs. according to following table, th is time is proportional to sampling frequency (fs). mctime[5:0] fs equivalent time(fs=48khz) 0x00 40/fs 0.8ms 0x01 128/fs 2.7ms 0x02 256/fs 5.3ms 0x03 384/fs 8.0ms 0x04 - 0x3d (128/fs / step) : 0x3e 7936/fs 165.3ms 0x3f 8064/fs 168.0ms note) the wait time for microphone input load charge the wait time can be optionally to set with mic input chargi ng time register. it is a recommended value of min1 couppling capacitor at the charge time. charge time capacity of capacitor charge time (minimum) mctime setting time (fs=48khz) 0.1f 16ms 0x09 0.22f 36ms 0x14 * charge time is proportional to capacity of capacitor. register map control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) a l l0 x 1 c0 x 1 d------- mapcon(*) -------0 index mapcon the register is to set register map. please refer register map about the ma p of the changing object. mapcon description 0 register map0 access enable 1 register map1 access enable
datasheet datasheet 44/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 analog reference power management register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x20 0x21 loren lolen losel - - micben 000 - - 000 index vmidcon(*) this register controls power up and down of the headphone output amplifier and the analog reference voltage generation circuit. vmidcon[1:0] these bits control power up and down of the vmid generati on circuit. power up time can be reduced by using high speed power up mode. vmid generation circuit should be changed to no rmal mode after power up is completed. about the timing of setting, please refer to the section of ?analog reference voltage (vmid) generation circuit?. vmidcon[1:0 description 0x0 vmid generation circuit power down 0x1 vmid generation circuit power up high speed power up mode 0x2 vmid generation circuit power up normal mode micben this bit controls power up and down of the micbias generation circuit. micben description 0 micbias generation circuit power down 1 micbias generation circuit power up losel this bit specify input path to headphone output am plifier. it is available dac output or spvol output. losel description 0 dac output is directly outputted from hpout. 1 dac output is outputted from hpout through spvol block. lolen this bit controls hpout left output enable or disable. lolen description 0 hpout left output disabled 1 hpout left output enabled loren this bit controls hpout right output enable or disable. loren description 0 hpout right output disabled 1 hpout right output enabled
datasheet datasheet 45/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 analog input power management register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x22 0x23 - - - - pgaen(*) adcren adclen lien ----0000 index this register controls power up and down of the input part of the analog circuit. lien this bit controls power up and down of the line input amplifier. lien description 0 line input amplifier power down 1 line input amplifier power up this lsi charge the couppling capacitor of lin pins, when lien bi t is changed from 0 to 1. this period?s time is counted by master clock which is between about 97ms and about 142ms. in this period, the output path of linvol amplifier is open, so input signal is muted for next part amplifier. it does n?t depend on lin1en,lin2en,lin3en,linmxen and micmxen registers. *pleas set this register to ?1? at mic recording. adclen this bit controls power up and down of the adc left. adclen description 0 adc left power down 1 adc left power up adcren this bit controls power up and down of the adc right. adcren description 0 adc right power down 1 adc right power up pgaen this bit controls power up and do wn of the mic input amplifier. pgaen description 0 mic input amplifier power down 1 mic input amplifier power up dac power management register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x24 0x25 - - - - - dacren daclen - -----00- index this register controls power up and down of the dac daclen this bit controls power on and off of the dac left daclen description 0 dac left power down 1 dac left power up dacren this bit controls power on and off of the dac right dacren description 0 dac right power down 1 dac right power up
datasheet datasheet 46/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 speaker amplifier power management register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x26 0x27 - - - - - spden spaben spmven -----000 index this register controls power up and down of the speaker amplifier and volume amplifier. spmven this bit controls power up and down of the mixvol (mixer and spvol volume) block. spmven description 0 mixvol block power down 1 mixvol block power up spaben this bit controls power up and down of the class-ab speaker amplifier. spaben description 0 class-ab speaker amplifier power down 1 class-ab speaker amplifier power up spden this bit controls power up and down of the class-d speaker amplifier. spden description 0 class-d speaker amplifier power down 1 class-d speaker amplifier power down *if spaben and spden are set to 1 at once, spaben is effective.
datasheet datasheet 47/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 am avoidance control / spamp input control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x2a 0x2b test2 - bp2spen mv2spen test1 test0 0 - 011111 index ama this register controls input path of speaker amplifier, se lect operation frequency of class- d speaker amplifier, and for shipment test. ama this bits control operation frequency of class-d speaker amplifier by am avoidance function. ama[1:0] description 0x0 700khz 0x1 600khz 0x2 500khz 0x3 400khz test0 this bit is for shipment test. d on?t change from initial value. test0 description 1 test register. use by 1 test1 this bit is for shipment test. d on?t change from initial value. test1 description 1 test register. use by 1 mv2spen this bit controls the input signal of speaker amplifier from mixer volume. mv2spen description 0 don?t input the signal from mixer volume to speaker amplifier. 1 input the signal from mixer volume to speaker amplifier. bp2spen this bit controls the input signal of speaker amplifier from mixer volume. bp2spen description 0 don?t input the signal from beepin amplifier to speaker amplifier. 1 input the signal from beepin am plifier to speaker amplifier. test2 this bit is for shipment test. d on?t change from initial value. test2 description 0 test register. use by 0.
datasheet datasheet 48/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 zero cross comparator power management register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 00 x 2 e0 x 2 f------z c e n- ------0- index this register is to set on and off of zerocross function about refreshing playvol setting by palc controller. zcen the zero cross is applied to refreshing playvol setti ngs when zero cross detecti on operation is effective. zcen description 0 zerocross detection operation is invalid. the gain setting of playvol is immediately reflected when the settings are changed. 1 zerocross detection operation is effective. the gain setting of playvol is reflected after zerocross detection. beepin amp control / micbias voltage control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x30 0x31 - - - test3 - - - 00100 index bpincon micbcon18s this register controls voltage value of microphone bias , and controls beepin amplifier and for shipment test. micbcon18s[1:0] these bits are to set the micbias. set the micbias voltage less than hvdd x 0.85. micbcon18s output voltage (the case of regout =1.8v) 0x0 1.50v 0x1 2.00v 0x2 2.50v 0x3 3.00v test3 this bit is for shipment test. d on?t change from initial value. test3 description 1 test register. use by 1 bpincon[1:0] these bits bpincon output voltage (the case of regout =1.8v) 0x0 beepin amplifier power down 0x1 prohibited 0x2 beepin amplifier power up at normal mode 0x3 beepin amplifier power up at high speed po wer up mode
datasheet datasheet 49/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 line-in control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x32 0x33 - - mxgain linmxen micmxen lin3en lin2en lin1en - - 010001 index this register controls the operation of line input amplifier path and mixer (linemix) lin1en lin1en description 0 line input amplifier lin1 path is off 1 line input amplifier lin1 path is on lin2en lin2en description 0 line input amplifier lin2 path is off 1 line input amplifier lin2 path is on lin3en lin3en description 0 line input amplifier lin3 path is off 1 line input amplifier lin3 path is on micmxen micmxen description 0 mixing of mic path in linemix is off 1 mixing of mic path in linemix is on linmxen linmxen description 0 mixing of lin path in linemix is off 1 mixing of lin path in linemix is on mxgain mxgain description 0 mixing gain in linemix is 0db 1 mixing g gain in linemix is -6db
datasheet datasheet 50/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 speaker amplifier volume control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x3a 0x3b - - - - 110011 spvol index this register is to set the mixvol volume gain. spvol[5:0] spvol[5:0] gain[db) memo value gain[db] memo 0x3f 6.0 0.5db step 0x1f -14.0 0x3e 5.5 0x1e -15.0 0x3d 5.0 0x1d -16.0 0x3c 4.5 0x1c -17.0 0x3b 4.0 0x1b -18.0 0x3a 3.5 0x1a -19.0 0x39 3.0 0x19 -20.0 0x38 2.5 0x18 -21.0 0x37 2.0 0x17 -22.0 0x36 1.5 0x16 -23.0 0x35 1.0 0x15 -24.0 0x34 0.5 0x14 -25.0 0x33 0.0 0x13 -26.0 0x32 -0.5 0x12 -27.0 0x31 -1.0 0x11 -28.0 0x30 -1.5 0x10 -29.0 0x2f -2.0 0x0f -30.0 0x2e -2.5 0x0e -31.0 0x2d -3.0 0x0d -32.0 2db step 0x2c -3.5 0x0c -34.0 0x2b -4.0 0x0b -36.0 0x2a -4.5 0x0a -38.0 0x29 -5.0 0x09 -40.0 0x28 -5.5 0x08 -42.0 0x27 -6.0 0x07 -44.0 0x26 -7.0 1db step 0x06 -46.0 0x25 -8.0 0x05 -48.0 0x24 -9.0 0x04 -50.0 0x23 -10.0 0x03 -52.0 0x22 -11.0 0x02 -54.0 0x21 -12.0 0x01 -56.0 0x20 -13.0 0x00 mute
datasheet datasheet 51/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 playback digital attenuator control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x3e 0x3f 11111111 index pdatt this register is to set the di gital volumegain on dac path. it is available mute and -71.5db to 0.5db every 0.5db. pdatt[7:0] these bits are to set playdatt : digital volumegain. pdatt[7:0] gain[db] value gain[db] value gain[db] value gain[db] 0x00 to 0x6e prohibited 0x93 -54.0 0xb8 -35.5 0xdd -17.0 0x6f mute 0x94 -53.5 0xb9 -35.0 0xde -16.5 0x70 -71.5 0x95 -53.0 0xba -34.5 0xdf -16.0 0x71 -71.0 0x96 -52.5 0xbb -34.0 0xe0 -15.5 0x72 -70.5 0x97 -52.0 0xbc -33.5 0xe1 -15.0 0x73 -70.0 0x98 -51.5 0xbd -33.0 0xe2 -14.5 0x74 -69.5 0x99 -51.0 0xbe -32.5 0xe3 -14.0 0x75 -69.0 0x9a -50.5 0xbf -32.0 0xe4 -13.5 0x76 -68.5 0x9b -50.0 0xc0 -31.5 0xe5 -13.0 0x77 -68.0 0x9c -49.5 0xc1 -31.0 0xe6 -12.5 0x78 -67.5 0x9d -49.0 0xc2 -30.5 0xe7 -12.0 0x79 -67.0 0x9e -48.5 0xc3 -30.0 0xe8 -11.5 0x7a -66.5 0x9f -48.0 0xc4 -29.5 0xe9 -11.0 0x7b -66.0 0xa0 -47.5 0xc5 -29.0 0xea -10.5 0x7c -65.5 0xa1 -47.0 0xc6 -28.5 0xeb -10.0 0x7d -65.0 0xa2 -46.5 0xc7 -28.0 0xec -9.5 0x7e -64.5 0xa3 -46.0 0xc8 -27.5 0xed -9.0 0x7f -64.0 0xa4 -45.5 0xc9 -27.0 0xee -8.5 0x80 -63.5 0xa5 -45.0 0xca -26.5 0xef -8.0 0x81 -63.0 0xa6 -44.5 0xcb -26.0 0xf0 -7.5 0x82 -62.5 0xa7 -44.0 0xcc -25.5 0xf1 -7.0 0x83 -62.0 0xa8 -43.5 0xcd -25.0 0xf2 -6.5 0x84 -61.5 0xa9 -43.0 0xce -24.5 0xf3 -6.0 0x85 -61.0 0xaa -42.5 0x cf -24.0 0xf4 -5.5 0x86 -60.5 0xab -42.0 0x d0 -23.5 0xf5 -5.0 0x87 -60.0 0xac -41.5 0xd1 -23.0 0xf6 -4.5 0x88 -59.5 0xad -41.0 0xd2 -22.5 0xf7 -4.0 0x89 -59.0 0xae -40.5 0x d3 -22.0 0xf8 -3.5 0x8a -58.5 0xaf -40.0 0xd4 -21.5 0xf9 -3.0 0x8b -58.0 0xb0 -39.5 0xd5 -21.0 0xfa -2.5 0x8c -57.5 0xb1 -39.0 0xd6 -20.5 0xfb -2.0 0x8d -57.0 0xb2 -38.5 0xd7 -20.0 0xfc -1.5 0x8e -56.5 0xb3 -38.0 0xd8 -19.5 0xfd -1.0 0x8f -56.0 0xb4 -37.5 0xd9 -19.0 0xfe -0.5 0x90 -55.5 0xb5 -37. 0 0xda -18.5 0xff 0.0 prohibited 0x91 -55.0 0xb6 -36.5 0xdb -18.0 0x92 -54.5 0xb7 -36.0 0xdc -17.5 *set 0xff is prohibited. it has possibilities that dac output waveform has distorted.
datasheet datasheet 52/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 amplifier volume control function enable register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 00 x 4 80 x 4 9------a v m u t ea v f a d e ------00 index this register is to set the mixvol vo lume fade function a nd mute function. avfade this bit is to set the on and off of the mixvol volume fade function. avfade description 0 fade function off the register setting value of spvo l is used actual volume va lue as it is. therefore the value is effective immediate. 1 fade function on the volume is changing to the register setting value of spvol with 1 step per avfcon register step time. avmute this bit is to set the volume to the mute state. the fade function by avfade is effe ctive against the volume change by this bit . and mixvol volume value by spvol is held and return to setting volume on release avmute value description 0 mixvol volume is set to mute off. register value of spvol is effective for mixvol volume. 1 mixvol volume is set to mute. register value of spvol cannot be changed by this bit, the volume is resumed by releasing this bit (avmute=0) to t he original setting value of spvol. * related register spvol: mixvolvolume control register (0x3a/0x3b) avfcon: mixvol volu me fader control register (0x4a/0x4b) amplifier volume fader control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x4a 0x4b - - - - - -----000 index avfcon this register controls the mixvol volume fade function. avfcon[2:0] these bits are to set the volume change st ep time of the mixvol volume fade functi on. the volume changes step by step with this setting period. step time is in proportion to sampling frequency (fs) as following table. avfcon[2:0] fs equivalent time(fs=48khz) 0x0 1/fs 20.8s 0x1 4/fs 83.3s 0x2 16/fs 333s 0x3 64/fs 1.33ms 0x4 256/fs 5.33ms 0x5 1024/fs 21.3ms 0x6 4096/fs 85.3ms 0x7 16384/fs 341.ms
datasheet datasheet 53/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 sai transmitter control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x4c 0x4d fmto msbo isscko afoo dlyo wslo 11000000 index pcmfo24 this register controls the sai transmit format setting. this r egister setting must not be chang ed during sai operation. set thi s register as same as sai receiver control register. wslo this bit specifies the lrclk polarity at this lsi?s transmiss ion. this bit must be set at ?1? when the flame synchronous transfer mode (fmto is ?1?). wslo description 0 left channel transmission at lrclk is ?l? level; right channel transmission at lrclk is ?h? level. 1 left channel transmission at lrclk is ?h? level; right channel transmission at lrclk is ?l? level. dlyo this bit specifies the existence for serial ou tput data one clock delay of master device. dlyo description 0 serial data delay exists 1 no serial data delay afoo this bit specifies left-justify or right-justify. in case of th e slave mode, this bit is ignored and fixed at left-justify. thi s bit must be set at ?0? when the flame synchronous transfer mode (fmto is ?1?). afoo description 0 left-justify 1 right-justify isscko this bit specifies 32fs or 64fs. isscko description 0 32fs 1 64fs msbo this bit specifies msb-first or lsb-first of the sai transmission data. msbo description 0 msb-first 1 lsb-first fmto this bit specifies transmission mode. fmto description 0 sai_lrclk transfer mode 1 flame synchronous transfer mode pcmfo24 this bit specifies pcm format of sai transmission data. pcmfo24 description 0x2 16bit pcm 0x3 24bit pcm other prohibited
datasheet datasheet 54/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 sai receiver control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x4e 0x4f fmti msbi isscki afoi dlyi wsli 11000000 index pcmfi24 this register controls the setting for the sai receive format. do not change this register during operation of the sai. set thi s register as same as sai transmitter control register. wsli this bit is to select lrclk polarity of this lsi. this bit must be set at ?1? when the flame synchronous transfer mode (fmti is ?1?). wsli description 0 left channel is received when lrclk is ?l? level, right channel is received at lrclk is ?h? level. 1 left channel is received when lrclk is ?h? level, right channel is received at lrclk is ?l? level. dlyi this bit specifies the existence for serial input data one clock delay of master device. dlyi description 0 serial data delay exists 1 no serial data delay afoi this bit specifies the receiving data of lef t-justify or right-justify. this bit must be set at ?0? when the flame synchronous transfer mode (fmti is ?1?). afoi description 0 left-justify 1 right-justify isscki this bit specifies the sampling frequency of sai_bclk pin. isscki description 0 32fs 1 64fs msbi this bit specifies the sai receiving data of msb-first or lsb-first. value description 0 msb-first 1 lsb-first fmti this bit specifies the receiving mode fmti description 0 lrclk transfer mode 1 flame synchronous transfer mode pcmfi24 this bit specifies the pcm format of sai receiving. value description 0x2 16bit pcm 0x3 24bit pcm other prohibited
datasheet datasheet 55/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 sai mode select register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x50 0x51 - - - bswp - - - mst(*) - - -0- - -0 index this register is to set master mode or slave mode of the sai. do not change this register during sai operation. mst this bit use by 0. mst description 0 slave mode bswp this bit is selected of the sai output data format. bswp description 0 sai output data format (16bit audio data:15bit-8bit,7bit-0bit) (24bit audio data:23bit-1 6bit,15bit-8bit,7bit-0bit) 1 sai output data format (16bit audio data:7bit-0bit,15bit-8bit) (24bit audio data:7bit-0bit,15bit-8bit 23bit-16bit) speaker amplifier output control1 register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 00 x 5 20 x 5 3------ ------00 index spmixg this register sets the gain of the speaker amplifier. spmixg[1:0] this bits sets the gain of the speaker amplifier. spmixg description 0 0db 1 6db 2 12db 3 18db
datasheet datasheet 56/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 speaker amplifier / lineout amplif ier output control2 register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x54 0x55 - - - - linoe micoe dacoe lomixg ----0000 index this register sets the input signal path to a mixvol part mixer lomxg this sets a mixing gain of t he dac output and the mic output. the line-input is 0db fix. lomxg description 0 the amplitude of a dac output and the mic output is added to mixvol in 0db. 1 the amplitude of a dac output and the mic output is added to mixvol in -6db. dacoe dacoe description 0 the connection of dac and mixvol is disable 1 the connection of dac and mixvol is enable micoe micoe description 0 the connection of mic-input and mixvol is disable 1 the connection of mic-input and mixvol is enable linoe linoe description 0 the connection of line-input and mixvol is disable 1 the connection of line-input and mixvol is enable dac clock setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x58 0x59 - - - - - - --00---- index osrsel this register performs clock setting to use in dac osrsel[1:0] sampling frequency pll use or nonuse clksel 8khz 11.025khz 12khz 16khz 22.05khz 24khz 32khz 44.1khz 48khz pll use 0x0 prohibited prohibited 0x00 0x2 prohibited 0x10 prohibited 0x3 0xe0 prohibited prohibited pll not use (mclki input) 0x4 prohibited 0x10 0x00 0x6 0xa0 0x10 0x00 0x7 0xe0 0x10 0x00
datasheet datasheet 57/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 mic interface control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 00 x 5 a0 x 5 b------m i n d i f ( * )- ------1- index this register controls mi crophone input interface. mindif mindif description 0 use analog microphone as single-ended input. 1 use analog microphone as differential input. sound effect mode register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x5c 0x5d semode - - - - 0- - - -000 semode index this register sets the filter block semode[7] bu26156 can use the filter block in adc path or dac pa th.filter block can set on only adc path or dac path. please refer ?single flow section on function description about filter block. semode[7] description 0 use filter block in recording 1 use filter block in playback semode[2:0] this chooses the number of the filter bands semode[2:0] description 0x0 notch5 band / eq0 band 0x1 notch4 band / eq1 band 0x2 notch3 band / eq2 band 0x3 notch2 band / eq3 band 0x4 notch1 band / eq4 band 0x5 notch0 band / eq5 band
datasheet datasheet 58/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 record path select register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x5e 0x5f - - - - - monorec i2sr i2sl -----000 index this register is to control recording path. in case of changing this register setting, you must stop this lsi by recplay bit in record/playback running control register. a setup of i2sl=1 and i2sr=1 is prohibition. i2sl this bit is to select the path to left channel of sai transmit data. i2sl description 0 sai left channel data is from left channel analog microphone input. 1 sai left channel data is from right channel analog microphone input. i2sr this bit is to select the path to right channel of sai transmit data. i2sr description 0 sai right channel data is from right channel analog microphone input. 1 sai right channel data is from left channel analog microphone input. figure 37 monorec this bit chooses whether adc output data connects in stereo, or it changes and connects in monaural. monorec description 0 adc output data connects in stereo lch output is lch-adc data rch output is rch-adc data 1 adc output data changes and connects in monaural. lch output is ( lch-adc data + rch-adc data ) / 2 rch output is ( lch-adc data + rch-adc data ) / 2 from left channel microphone input 1 1 0 0 to sai left channel to sai right channel from right channel microphone input i2sl i2sr adc lch adc rch
datasheet datasheet 59/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 record digital attenuator control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x60 0x61 11111111 rdvol index this register is to set the digi tal volume of the recording path. their values are 0.5db step from -71.5db to 0.0db, and mute. rdvol[7:0] rdvol gain(db) rdvol gain(db) rdvol gain(db) rdvol gain(db) 0x00 to 0x6e write prohibit 0x93 -54.0 0xb8 -35.5 0xdd -17.0 0x6f mute 0x94 -53.5 0xb9 -35.0 0xde -16.5 0x70 -71.5 0x95 -53.0 0xba -34.5 0xdf -16.0 0x71 -71.0 0x96 -52.5 0xbb -34.0 0xe0 -15.5 0x72 -70.5 0x97 -52.0 0xbc -33.5 0xe1 -15.0 0x73 -70.0 0x98 -51.5 0xbd -33.0 0xe2 -14.5 0x74 -69.5 0x99 -51.0 0xbe -32.5 0xe3 -14.0 0x75 -69.0 0x9a -50.5 0xbf -32.0 0xe4 -13.5 0x76 -68.5 0x9b -50.0 0xc0 -31.5 0xe5 -13.0 0x77 -68.0 0x9c -49.5 0xc1 -31.0 0xe6 -12.5 0x78 -67.5 0x9d -49.0 0xc2 -30.5 0xe7 -12.0 0x79 -67.0 0x9e -48.5 0xc3 -30.0 0xe8 -11.5 0x7a -66.5 0x9f -48.0 0xc4 -29.5 0xe9 -11.0 0x7b -66.0 0xa0 -47.5 0xc5 -29.0 0xea -10.5 0x7c -65.5 0xa1 -47.0 0xc6 -28.5 0xeb -10.0 0x7d -65.0 0xa2 -46.5 0xc7 -28.0 0xec -9.5 0x7e -64.5 0xa3 -46.0 0xc8 -27.5 0xed -9.0 0x7f -64.0 0xa4 -45.5 0xc9 -27.0 0xee -8.5 0x80 -63.5 0xa5 -45.0 0xca -26.5 0xef -8.0 0x81 -63.0 0xa6 -44.5 0xcb -26.0 0xf0 -7.5 0x82 -62.5 0xa7 -44.0 0xcc -25.5 0xf1 -7.0 0x83 -62.0 0xa8 -43.5 0xcd -25.0 0xf2 -6.5 0x84 -61.5 0xa9 -43.0 0xce -24.5 0xf3 -6.0 0x85 -61.0 0xaa -42.5 0x cf -24.0 0xf4 -5.5 0x86 -60.5 0xab -42.0 0x d0 -23.5 0xf5 -5.0 0x87 -60.0 0xac -41.5 0xd1 -23.0 0xf6 -4.5 0x88 -59.5 0xad -41.0 0xd2 -22.5 0xf7 -4.0 0x89 -59.0 0xae -40.5 0x d3 -22.0 0xf8 -3.5 0x8a -58.5 0xaf -40.0 0xd4 -21.5 0xf9 -3.0 0x8b -58.0 0xb0 -39.5 0xd5 -21.0 0xfa -2.5 0x8c -57.5 0xb1 -39.0 0xd6 -20.5 0xfb -2.0 0x8d -57.0 0xb2 -38.5 0xd7 -20.0 0xfc -1.5 0x8e -56.5 0xb3 -38.0 0xd8 -19.5 0xfd -1.0 0x8f -56.0 0xb4 -37.5 0xd9 -19.0 0xfe -0.5 0x90 -55.5 0xb5 -37.0 0xda -18.5 0xff 0.0 0x91 -55.0 0xb6 -36.5 0xdb -18.0 0x92 -54.5 0xb7 -36.0 0xdc -17.5
datasheet datasheet 60/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 playback effect volume control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x62 0x63 11111111 index effect vol this register is to set the digital volume of the playback path. their values are 0.5db step from -71.5db to 0.0db, and mute. effect vol[7:0] effect vol gain(db) effect vol gain(db) effect vol gain(db) effect vol gain(db) 0x00 to 0x6e write prohibit 0x93 -54.0 0xb8 -35.5 0xdd -17.0 0x6f mute 0x94 -53.5 0xb9 -35.0 0xde -16.5 0x70 -71.5 0x95 -53.0 0xba -34.5 0xdf -16.0 0x71 -71.0 0x96 -52.5 0xbb -34.0 0xe0 -15.5 0x72 -70.5 0x97 -52.0 0xbc -33.5 0xe1 -15.0 0x73 -70.0 0x98 -51.5 0xbd -33.0 0xe2 -14.5 0x74 -69.5 0x99 -51.0 0xbe -32.5 0xe3 -14.0 0x75 -69.0 0x9a -50.5 0xbf -32.0 0xe4 -13.5 0x76 -68.5 0x9b -50.0 0xc0 -31.5 0xe5 -13.0 0x77 -68.0 0x9c -49.5 0xc1 -31.0 0xe6 -12.5 0x78 -67.5 0x9d -49.0 0xc2 -30.5 0xe7 -12.0 0x79 -67.0 0x9e -48.5 0xc3 -30.0 0xe8 -11.5 0x7a -66.5 0x9f -48.0 0xc4 -29.5 0xe9 -11.0 0x7b -66.0 0xa0 -47.5 0xc5 -29.0 0xea -10.5 0x7c -65.5 0xa1 -47.0 0xc6 -28.5 0xeb -10.0 0x7d -65.0 0xa2 -46.5 0xc7 -28.0 0xec -9.5 0x7e -64.5 0xa3 -46.0 0xc8 -27.5 0xed -9.0 0x7f -64.0 0xa4 -45.5 0xc9 -27.0 0xee -8.5 0x80 -63.5 0xa5 -45.0 0xca -26.5 0xef -8.0 0x81 -63.0 0xa6 -44.5 0xcb -26.0 0xf0 -7.5 0x82 -62.5 0xa7 -44.0 0xcc -25.5 0xf1 -7.0 0x83 -62.0 0xa8 -43.5 0xcd -25.0 0xf2 -6.5 0x84 -61.5 0xa9 -43.0 0xce -24.5 0xf3 -6.0 0x85 -61.0 0xaa -42.5 0x cf -24.0 0xf4 -5.5 0x86 -60.5 0xab -42.0 0x d0 -23.5 0xf5 -5.0 0x87 -60.0 0xac -41.5 0xd1 -23.0 0xf6 -4.5 0x88 -59.5 0xad -41.0 0xd2 -22.5 0xf7 -4.0 0x89 -59.0 0xae -40.5 0x d3 -22.0 0xf8 -3.5 0x8a -58.5 0xaf -40.0 0xd4 -21.5 0xf9 -3.0 0x8b -58.0 0xb0 -39.5 0xd5 -21.0 0xfa -2.5 0x8c -57.5 0xb1 -39.0 0xd6 -20.5 0xfb -2.0 0x8d -57.0 0xb2 -38.5 0xd7 -20.0 0xfc -1.5 0x8e -56.5 0xb3 -38.0 0xd8 -19.5 0xfd -1.0 0x8f -56.0 0xb4 -37.5 0xd9 -19.0 0xfe -0.5 0x90 -55.5 0xb5 -37.0 0xda -18.5 0xff 0.0 0x91 -55.0 0xb6 -36.5 0xdb -18.0 0x92 -54.5 0xb7 -36.0 0xdc -17.5
datasheet datasheet 61/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 dsp filter function enable register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x66 0x67 hpf2od eq4en eq3en eq2en eq1en eq0en hpf2en hpf1en 00000001 index this register is to set on or off for dsp filtering function. hpf1en this bit is to set on or off of a first-order high pass filt er for dc cut. do not change this bit during operation of the recor ding (0x13/0x14: recplay=0x1, 0x3, or 0x7). if this bit is changed, the noise may be generated. hpf1en description 0 dc cut first-order high pass filter off 1 dc cut first-order high pass filter on hpf2en this bit is to set on or off of a second-order high pass filter for noise cut. ($13h/$14h: recp lay=1 or 2). if this bit is changed, the noise may be generated. hpf2en description 0 noise cut second-order high pass filter off 1 noise cut second-order high pass filter on eq0en this bit is to set on or off of equalizer band 0. in case of changing this bit during recording and playback operation (0x13/0x14: recplay=0x1, 0x2, 0x3, or 0x7), enables digi tal volume fade function (0x68/0x69: dvfade=1) and then change the gain to 0db. eq0en description 0 equalizer band 0 disable 1 equalizer band 0 enable eq1en this bit is to set on or off of equalizer band 1. in case of changing this bit during recording and playback operation (0x13/0x14: recplay=0x1, 0x2, 0x3, or 0x7), enables digital volume fade function (0x68/0x69: dvfade=1) and then change the gain to 0db. eq1en description 0 equalizer band 1 disable 1 equalizer band 1 enable eq2en this bit is to set on or off of equalizer band 2. in case of changing this bit during recording and playback operation (0x13/0x14: recplay=0x1, 0x2, 0x3, or 0x7), enables digital volume fade function (0x68/0x69: dvfade=1) and then change the gain to 0db. eq2en description 0 equalizer band 2 disable 1 equalizer band 2 enable eq3en this bit is to set on or off of equalizer band 3. in case of changing this bit during recording and playback operation (0x13/0x14: recplay=0x1, 0x2, 0x3, or 0x7), enables digital volume fade function (0x68/0x69: dvfade=1) and then change the gain to 0db. eq3en description 0 equalizer band 3 disable 1 equalizer band 3 enable eq4en this bit is to set on or off of equalizer band 4. in case of changing this bit during recording and playback operation (0x13/0x14: recplay=0x1, 0x2, 0x3, or 0x7), enables digital volume fade function (0x68/0x69: dvfade=1) and then change the gain to 0db. eq4en description 0 equalizer band 4 disable 1 equalizer band 4 enable
datasheet datasheet 62/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 hpf2od this bit is to set number of high pass filter order(hpf2en bit) for noise cut. in recording or playback operation(recplay 0x0 ), do not change this bit. if this bit is changed, the noise may be generated. hpf2od description 0 second-order high pass filter 1 first-order high pass filter digital volume control function enable register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x68 0x69 - - - dvmute dvfade - - palcen - - -00- -0 index this register is to set on or off for digital volume control function. palcen this bit is to set on or off of limiter at playback. set this register at stop state. (recplay=0x0) set palcen register? value same as rppl register (0xae/0xaf) setting description 0 palc off at playback 1 palc on at playback dvfade this bit is to set on or off of digital volume fade functi on. the fade function is effectiv e for the recording and playback digital volume and the equalizer gain. setting description 0 fade function off: the register setting value of rdatt, pdatt and eqgain0 to 3 is used actual volume value as it is. therefore the value is effective immediate. 1 fade function on: the volume is changing to the register setting value of rdatt, pdatt and eqgain0 to 3 with 1 step per dvfcon register step time. dvmute this bit is to set mute of the digital volume. this mute func tion is effective for the recording digital volume at recording an d effective for playback digital volume at playback. the fade function by dvfade is effective against the volume change by this bit. setting description 0 register value of rdvol and pdatt is effective. 1 digital volume is set to mute. register value of rdvol and pdatt cannot be changed by this bit, the volume is resumed by releasing this bit(dvmute=0) to the original setting value of rdvol and pdvol.
datasheet datasheet 63/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 mixer & volume control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x6a 0x6b 00000000 rmcon lmcon index dvfcon this register is to control the sai receive data l channel plus r channel mixer and the digital volume fade control. lmcon[1:0] these bits are to control the sai receive data l channel plus r channel mixer lmcon description 0x0 use l discard r 0x1 use r discard l 0x2 use (l+r) 0x3 use (l+r)/2 rmcon[1:0] these bits are to control the sai receive data r channel plus l channel mixer rmcon description 0x0 use r discard l 0x1 use l discard r 0x2 use (l+r) 0x3 use (l+r)/2 dvfcon[3:0] these bits are to set the volume change step time of the digital volume fade function. the volume changes step by step (0.5db) with this setting period. step time is in proportion to sampling frequency (fs) as following table. dvfcon fs equivalent time(fs=48khz) 0x0 1/fs 20.8s 0x1 2/fs 41.7s 0x2 4/fs 83.3s 0x3 8/fs 167s 0x4 16/fs 333s 0x5 32/fs 667s 0x6 64/fs 1.33ms 0x7 128/fs 2.67ms 0x8 256/fs 5.33ms 0x9 512/fs 10.7ms 0xa 1024/fs 21.3ms 0xb 2048/fs 42.7ms 0xc 4096/fs 85.3ms 0xd 8192/fs 171ms 0xe 16384/fs 341ms
datasheet datasheet 64/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 eq band0 gain setting register eq band1 gain setting register eq band2 gain setting register eq band3 gain setting register eq band4 gain setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x74 0x75 11100111 0x0 0x76 0x77 11100111 0x0 0x78 0x79 11100111 0x0 0x7a 0x7b 11100111 0x0 0x7c 0x7d 11100111 eqgain4 eqgain3 eqgain2 eqgain1 index eqgain0 these registers are to set the gain of each band equalizer. (*)index values are different by setting sound effect mode register. see sound effect mode register description. eqgain 0 to 4[7:0] gain (0db) eqgain 0 to 4[7:0] gain (0db) eqgain 0 to 4[7:0] gain (db) eqgain 0 to 4[7:0] gain (db) 0x00 to 0x57 mute 0x82 -50.5 0xad -29.0 0xd8 -7.5 0x58 -71.5 0x83 -50.0 0xae -28.5 0xd9 -7.0 0x59 -71.0 0x84 -49.5 0xaf -28.0 0xda -6.5 0x5a -70.5 0x85 -49.0 0xb0 -27.5 0xdb -6.0 0x5b -70.0 0x86 -48.5 0xb1 -27.0 0xdc -5.5 0x5c -69.5 0x87 -48.0 0xb2 -26.5 0xdd -5.0 0x5d -69.0 0x88 -47.5 0xb3 -26.0 0xde -4.5 0x5e -68.5 0x89 -47.0 0xb4 -25.5 0xdf -4.0 0x5f -68.0 0x8a -46.5 0xb5 -25.0 0xe0 -3.5 0x60 -67.5 0x8b -46.0 0xb6 -24.5 0xe1 -3.0 0x61 -67.0 0x8c -45.5 0xb7 -24.0 0xe2 -2.5 0x62 -66.5 0x8d -45.0 0xb8 -23.5 0xe3 -2.0 0x63 -66.0 0x8e -44.5 0xb9 -23.0 0xe4 -1.5 0x64 -65.5 0x8f -44.0 0xba -22.5 0xe5 -1.0 0x65 -65.0 0x90 -43.5 0xbb -22.0 0xe6 -0.5 0x66 -64.5 0x91 -43.0 0xbc -21.5 0xe7 0.0 0x67 -64.0 0x92 -42.5 0xbd -21.0 0xe8 0.5 0x68 -63.5 0x93 -42. 0 0xbe -20.5 0xe9 1.0 0x69 -63.0 0x94 -41. 5 0xbf -20.0 0xea 1.5 0x6a -62.5 0x95 -41. 0 0xc0 -19.5 0xeb 2.0 0x6b -62.0 0x96 -40.5 0xc1 -19.0 0xec 2.5 0x6c -61.5 0x97 -40.0 0xc2 -18.5 0xed 3.0 0x6d -61.0 0x98 -39. 5 0xc3 -18.0 0xee 3.5 0x6e -60.5 0x99 -39.0 0xc4 -17.5 0xef 4.0 0x6f -60.0 0x9a -38.5 0xc5 -17.0 0xf0 4.5 0x70 -59.5 0x9b -38.0 0xc6 -16.5 0xf1 5.0 0x71 -59.0 0x9c -37.5 0xc7 -16.0 0xf2 5.5 0x72 -58.5 0x9d -37.0 0xc8 -15.5 0xf3 6.0 0x73 -58.0 0x9e -36.5 0xc9 -15.0 0xf4 6.5 0x74 -57.5 0x9f -36.0 0xca -14.5 0xf5 7.0 0x75 -57.0 0xa0 -35.5 0xcb -14.0 0xf6 7.5 0x76 -56.5 0xa1 -35.0 0xcc -13.5 0xf7 8.0 0x77 -56.0 0xa2 -34.5 0xcd -13.0 0xf8 8.5 0x78 -55.5 0xa3 -34.0 0xce -12.5 0xf9 9.0 0x79 -55.0 0xa4 -33.5 0xcf -12.0 0xfa 9.5 0x7a -54.5 0xa5 -33.0 0xd0 -11.5 0xfb 10.0 0x7b -54.0 0xa6 -32.5 0xd1 -11.0 0xfc 10.5 0x7c -53.5 0xa7 -32.0 0xd2 -10.5 0xfd 11.0 0x7d -53.0 0xa8 -31.5 0xd3 -10.0 0xfe 11.5 0x7e -52.5 0xa9 -31.0 0xd4 -9.5 0xff 12.0 0x7f -52.0 0xaa -30.5 0xd5 -9.0 0x80 -51.5 0xab -30.0 0xd6 -8.5 0x81 -51.0 0xac -29.5 0xd7 -8.0
datasheet datasheet 65/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 high pass filter2 cut-off control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x7e 0x7f - - - - - -----000 index hpf2cut hpf2cut[2:0] this register is to set the cut off frequency of the high pass f ilter for noise reduction. do not change this register setting at filtering operation. these bits are to set the cut-off frequenc y of noise reduction high pass filter. the following table shows that the frequency decreases 3db at second order filter selected (hpf2od=0) and decreases 1.5db at first order filter selected (hpf2od=1). setting cut-off frequency(hz) fs=8khz, 16khz, 32khz fs=11.025khz, 22.05khz, 44.1khz fs=12khz, 24khz, 48khz 0x0 80 110 120 0x1 100 138 150 0x2 130 179 195 0x3 160 221 240 0x4 200 276 300 0x5 260 358 390 0x6 320 441 480 0x7 400 551 600
datasheet datasheet 66/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 programable equalizer band0 coefficient-a0 (l) register programable equalizer band0 coefficient-a0 (h) register programable equalizer band0 coefficient-a1 (l) register programable equalizer band0 coefficient-a1 (h) register programable equalizer band1 coefficient-a0 (l) register programable equalizer band1 coefficient-a0 (h) register programable equalizer band1 coefficient-a1 (l) register programable equalizer band1 coefficient-a1 (h) register programable equalizer band2 coefficient-a0 (l) register programable equalizer band2 coefficient-a0 (h) register programable equalizer band2 coefficient-a1 (l) register programable equalizer band2 coefficient-a1 (h) register programable equalizer band3 coefficient-a0 (l) register programable equalizer band3 coefficient-a0 (h) register programable equalizer band3 coefficient-a1 (l) register programable equalizer band3 coefficient-a1 (h) register programable equalizer band4 coefficient-a0 (l) register programable equalizer band4 coefficient-a0 (h) register programable equalizer band4 coefficient-a1 (l) register programable equalizer band4 coefficient-a1 (h) register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0x80 0x81 00000000 0x0 0x82 0x83 00000000 0x0 0x84 0x85 00000000 0x0 0x86 0x87 00000000 0x0 0x88 0x89 00000000 0x0 0x8a 0x8b 00000000 0x0 0x8c 0x8d 00000000 0x0 0x8e 0x8f 00000000 0x0 0x90 0x91 00000000 0x0 0x92 0x93 00000000 0x0 0x94 0x95 00000000 0x0 0x96 0x97 00000000 0x0 0x98 0x99 00000000 0x0 0x9a 0x9b 00000000 0x0 0x9c 0x9d 00000000 0x0 0x9e 0x9f 00000000 0x0 0xa0 0xa1 00000000 0x0 0xa2 0xa3 00000000 0x0 0xa4 0xa5 00000000 0x0 0xa6 0xa7 00000000 eq4a1h eq4a1l eq4a0h eq4a0l eq3a1h eq3a1l eq3a0h eq3a0l eq2a1h eq2a1l eq2a0h eq2a0l eq1a1h eq1a1l eq1a0h eq1a0l eq0a1h eq0a1l eq0a0h eq0a0l index these registers are to set the coefficients a0 and a1 of eac h five band programmable equalizer. one coefficients value is specified by two bytes data. the centre fr equency and band width of the filter can be set by changing these register value.
datasheet datasheet 67/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 please do not change the register setting during corresponding f ilter operation (*).the detailed setting value is described in the filter function. (*) (recplay is not 0x0) and (eq0en=1 or eq1en=1 or eq2en=1 or eq3en=1) recplay play limitter enable register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 00 x a e0 x a f-------r p p l -------0 index rppl this bit is to set on or off of limiter at playback. set this register at stop state. (recplay=0x0) set rppl register? value same as placen register (0x68/0x69) setting description 0 palc off at playback 1 palc on at playback
datasheet datasheet 68/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 soft clip enable register soft clip threshold h register soft clip threshold m register soft clip threshold l register soft clip gain register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 00 x b 00 x b 1-------s c e n -------0 0x0 0xb2 0xb3 - - 0000000 0x0 0xb4 0xb5 00000000 0x0 0xb6 0xb7 00000000 0x0 0xb8 0xb9 - - - - - -----001 scgain scthrl scthrm index scthrh this register is setting of the "softclip" block. scen setting description 0 softclip function off 1 softclip function on scthrh scthrm scthrl this register sets a soft clip threshold level. when pcm signal with more than of this bit is input, the lsi clips it according to a value of scgain and works. the value of threshold level is 23bit( scthrm[6:0], scthrm[7 :0], scthrl[7:0]) please do not change the value of this bit during softclip function movement. scgain[2:0] this register is setting the gain at softclip. this register setting must not be changed during softclip function is active. setting description 0x0 2 time 0x1 1 time(default) 0x2 1/2 time 0x3 1/4 time 0x4 1/8 time 0x5 1/16 time 0x6 1/32 time 0x7 1/64 time
datasheet datasheet 69/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 mic alc control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 00 x b a0 x b b------m c l e nm a l c e n ------11 index this register sets the alc for mic input please refer to function explanation for the details of this function malcen this sets the mic alc. in the case of off, mic alc suffers from ga in of micamp with a value of malcmxgain setting description 0 malc function off 1 malc function on (default) mclen this sets the mic clip reduction. setting description 0 mic clip reduction off 1 mic clip reduction on (default) mic alc attack /decay time register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0xbc 0xbd - - -100-100 malcdcy malcatk index this register sets decay time in attack time of the mic alc. malcatk[2:0] mic alc attack time setting 8khz 11.025k hz 12khz 16khz 22.05kh z 24khz 32khz 44.1khz 48khz unit 0 0.25 0.18 0.17 0.13 0.09 0.08 0.06 0.05 0.04 ms 1 0.5 0.36 0.33 0.25 0.18 0.17 0.13 0.09 0.08 ms 2 1.0 0.73 0.67 0.5 0.36 0.33 0.25 0.18 0.17 ms 3 2.0 1.45 1.33 1.0 0.73 0.67 0.5 0.36 0.33 ms 4 4.0 2.9 2.67 2.0 1.45 1.33 1.0 0.73 0.67 ms 5 8.0 5.8 5.33 4.0 2.9 2. 67 2.0 1.45 1.33 ms 6 16.0 11.61 10.67 8.0 5.8 5.33 4.0 2.9 2.67 ms 7 32.0 23.22 21.33 16.0 11.6 1 10.67 8.0 5.8 5.33 ms malcdcy[2:0] mic alc decay time setting 8khz 11.025k hz 12khz 16khz 22.05kh z 24khz 32khz 44.1khz 48khz unit 0 64 46 43 32 23 21 16 12 11 ms 1 128 93 85 64 46 43 32 23 21 ms 2 256 186 171 128 93 85 64 46 43 ms 3 512 372 341 256 186 171 128 93 85 ms 4 1024 743 683 512 372 341 256 186 171 ms 5 2048 1486 1365 1024 743 683 512 372 341 ms 6 4096 2972 2731 2048 1486 1365 1024 743 683 ms 7 8192 5944 5461 4096 2972 2731 2048 1486 1365 ms
datasheet datasheet 70/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 mic alc max gain register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0xbe 0xbf - - - - 010000 index malcmxgain this register sets the alc max gain for mic input malcgain[5:0] mic alc max gain. setting description 0x3f 35.25db 0x3e 34.50db : (0.75db/step) 0x28 18.00db : (0.75db/step) 0x11 0.75db 0x10 0.00db : prohibited 0x00 prohibited line alc control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0xc4 0xc5 - - - - - - lclen lalcen ------00 index this register sets the alc for line input please refer to function explanation for the details of this function lalcen this sets the line alc. setting description 0 lalc function off (default) 1 lalc function on lclen this sets the line clip reduction. setting description 0 line clip reduction off (default) 1 line clip reduction on
datasheet datasheet 71/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 line alc attack /decay time register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0xc6 0xc7 - - -111-100 lalcatk index lalcdcy this register sets decay time in attack time of the line alc. lalcatk[2:0] line alc attack time setting 8khz 11.025k hz 12khz 16khz 22.05kh z 24khz 32khz 44.1khz 48khz unit 0 0.5 0.4 0.3 0.3 0. 2 0.2 0.1 0.1 0.1 ms 1 1.0 0.7 0.7 0.5 0. 4 0.3 0.3 0.2 0.2 ms 2 2.0 1.5 1.3 1.0 0. 7 0.7 0.5 0.4 0.3 ms 3 4.0 2.9 2.7 2.0 1. 5 1.3 1.0 0.7 0.7 ms 4 8.0 5.8 5.3 4.0 2. 9 2.7 2.0 1.5 1.3 ms 5 16.0 11.6 10.7 8.0 5. 8 5.3 4.0 2.9 2.7 ms 6 32.0 23.2 21.3 16.0 11.6 10.7 8.0 5.8 5.3 ms 7 64.0 46.4 42.7 32.0 23.2 21.3 16.0 11.6 10.7 ms lalcdcy[2:0] line alc decay time setting 8khz 11.025k hz 12khz 16khz 22.05kh z 24khz 32khz 44.1khz 48khz unit 0 64 46 43 32 23 21 16 12 11 ms 1 128 93 85 64 46 43 32 23 21 ms 2 256 186 171 128 93 85 64 46 43 ms 3 512 372 341 256 186 171 128 93 85 ms 4 1024 743 683 512 372 341 256 186 171 ms 5 2048 1486 1365 1024 743 683 512 372 341 ms 6 4096 2972 2731 2048 1486 1365 1024 743 683 ms 7 ms line alc max gain register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0xc8 0xc9 - - - - ----1111 index lalcmxgain this register sets the alc max gain for line input lalcgain[3:0] line alc max gain. setting description 0xf 6db 0xe 5db : (1db/step) 0x1 -8db 0x0 -9db
datasheet datasheet 72/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 playback alc attack time control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0xdc 0xdd - - - - ----0100 index palcatk this register is to set the attack time that is the step period for the playback alc volume down. palcatk[3:0] these bits are to set the playback alc attack time. the playback alc volume downs step by step per this attack time period. attack time is in proportion to sampling frequency(fs) as following table. setting fs equivalent time(fs=48khz) 0x0 1/fs 20.8us 0x1 2/fs 41.7us 0x2 4/fs 83.3us 0x3 8/fs 167us 0x4 16/fs 333us 0x5 32/fs 667us 0x6 64/fs 1.33ms 0x7 128/fs 2.67ms 0x8 256/fs 5.33ms 0x9 512/fs 10.7ms 0xa 1024/fs 21.3ms 0xb 2048/fs 42.7ms 0xc 4096/fs 85.3ms 0xd 8192/fs 171ms 0xe 16384/fs 341ms 0xf 32768/fs 683ms
datasheet datasheet 73/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 playback alc decay time control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0xde 0xdf - - - - ----0101 index palcdcy this register is to set the decay time that is the step period for the playback alc volume up. palcdcy[3:0] these bits are to set the playback alc decay time. the playback alc volume ups step by step per this decay time period. decay time is in proportion to sampling frequency(fs) as following table. setting fs equivalent time(fs=48khz) 0x0 4/fs 83.3us 0x1 8/fs 167us 0x2 16/fs 333us 0x3 32/fs 667us 0x4 64/fs 1.33ms 0x5 128/fs 2.67ms 0x6 256/fs 5.33ms 0x7 512/fs 10.7ms 0x8 1024/fs 21.3ms 0x9 2048/fs 42.7ms 0xa 4096/fs 85.3ms 0xb 8192/fs 171ms 0xc 16384/fs 341ms 0xd 32768/fs 683ms 0xe 65536/fs 1.37s 0xf 131072/fs 2.73s playback alc target level control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0xe0 0xe1 - - - - - - 11011 index palclvl this register is to set the target level of the playback alc. palclvl[4:0] these bits are to set the target level of the playback alc. setting target level (dbfs) setting target level (dbfs) 0x00 -23.25 0x10 -11.25 0x01 -22.50 0x11 -10.50 0x02 -21.75 0x12 -9.75 0x03 -21.00 0x13 -9.00 0x04 -20.25 0x14 -8.25 0x05 -19.50 0x15 -7.50 0x06 -18.75 0x16 -6.75 0x07 -18.00 0x17 -6.00 0x08 -17.25 0x18 -5.25 0x09 -16.50 0x19 -4.50 0x0a -15.75 0x1a -3.75 0x0b -15.00 0x1b -3.00 0x0c -14.25 0x1c -2.25 0x0d -13.50 0x1d -1.50 0x0e -12.75 0x0f -12.00
datasheet datasheet 74/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 playback alc min gain control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0xe2 0xe3 - - - - - -----000 index palcmingain this register is to set the upper limit and t he lower limit at the playback alc operation. palcmingain[2:0] these bits are to set the lower lim it at the playback alc operation. setting min gain (db) 0x00 -12.0 0x01 -6.0 0x02 0.0 0x03 +6.0 0x04 +12.0 0x05 +18.0 0x06 +24.0 0x07 +30.0
datasheet datasheet 75/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 playback alc volume control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0xe4 0xe5 - - 0100000 palcvol index this register is to set the volume that is used in the palc. it can be set the volume up to +35.625db. also this volume can be used as a playback path boost volume when the palc is not used. palcvol[6:0] palcvol becomes a fixed gain at the time of ?palcen=0?. palcvol becomes a palc maximum gain at the time of ?palcen=1?. palcvol gain (db) palcvol gain (db) palcvol gain (db) palcvol gain (db) 0x00 -12.000 0x20 0.000 0x40 12.000 0x60 24.000 0x01 -11.625 0x21 0.375 0x41 12.375 0x61 24.375 0x02 -11.250 0x22 0.750 0x42 12.750 0x62 24.750 0x03 -10.875 0x23 1.125 0x43 13.125 0x63 25.125 0x04 -10.500 0x24 1.500 0x44 13.500 0x64 25.500 0x05 -10.125 0x25 1.875 0x45 13.875 0x65 25.875 0x06 -9.750 0x26 2.250 0x46 14.250 0x66 26.250 0x07 -9.375 0x27 2.625 0x47 14.625 0x67 26.625 0x08 -9.000 0x28 3.000 0x48 15.000 0x68 27.000 0x09 -8.625 0x29 3.375 0x49 15.375 0x69 27.375 0x0a -8.250 0x2a 3.750 0x4a 15.750 0x6a 27.750 0x0b -7.875 0x2b 4.125 0x4b 16.125 0x6b 28.125 0x0c -7.500 0x2c 4.500 0x4c 16.500 0x6c 28.500 0x0d -7.125 0x2d 4.875 0x4d 16.875 0x6d 28.875 0x0e -6.750 0x2e 5.250 0x4e 17.250 0x6e 29.250 0x0f -6.375 0x2f 5.625 0x4f 17.625 0x6f 29.625 0x10 -6.000 0x30 6.000 0x50 18.000 0x70 30.000 0x11 -5.625 0x31 6.375 0x51 18.375 0x71 30.375 0x12 -5.250 0x32 6.750 0x52 18.750 0x72 30.750 0x13 -4.875 0x33 7.125 0x53 19.125 0x73 31.125 0x14 -4.500 0x34 7.500 0x54 19.500 0x74 31.500 0x15 -4.125 0x35 7.875 0x55 19.875 0x75 31.875 0x16 -3.750 0x36 8.250 0x56 20.250 0x76 32.250 0x17 -3.375 0x37 8.625 0x57 20.625 0x77 32.625 0x18 -3.000 0x38 9.000 0x58 21.000 0x78 33.000 0x19 -2.625 0x39 9.375 0x59 21.375 0x79 33.375 0x1a -2.250 0x3a 9.750 0x5a 21.750 0x7a 33.750 0x1b -1.875 0x3b 10.125 0x5b 22.125 0x7b 34.125 0x1c -1.500 0x3c 10.500 0x5c 22.500 0x7c 34.500 0x1d -1.125 0x3d 10.875 0x5d 22.875 0x7d 34.875 0x1e -0.750 0x3e 11.250 0x5e 23.250 0x7e 35.250 0x1f -0.375 0x3f 11.625 0x5f 23.625 0x7f 35.625
datasheet datasheet 76/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 playback alc zerocro ss timeout register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 00 x e 60 x e 7------ ------00 index palczctm palczctm[1:0] this register is to set the value of zero cross time out in playback alc. setting fs equivalent time(fs=48khz) 0x0 128/fs 2.67ms 0x1 256/fs 5.33ms 0x2 512/fs 10.7ms 0x3 1024/fs 21.3ms playback limiter fast release setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0xea 0xeb palcfren - 00010 - 01 index palcfrth palcfrsp this register is to set the fast release in playback alc. palcfren this is to set the fast release enable in playback alc. setting description 0 disable 1 enable palcfrsp[1:0] these bits are to set the release speed in playback alc. release speed is expressed with palcdcy. setting release speed 0x0 (1 / 4) * palcdcy 0x1 (1 / 8) * palcdcy 0x2 (1 / 16) * palcdcy 0x3 (1 / 32) * palcdcy palcfrth[3:0] this bit can set the threshold in fast release (playback alc). whether to make fast release effective by the gain down in which extent. setting threshold (1step=0.375db) setting threshold (1step=0.375db) 0x0 13step = 4.875db 0x8 24step = 9.000db 0x1 15step = 5.625db 0x9 25step = 9.375db 0x2 16step = 6.000db 0xa 27step = 10.125db 0x3 17step = 6.375db 0xb 28step = 10.500db 0x4 19step = 7.125db 0xc 29step = 10.875db 0x5 20step = 7.500db 0x d 31step = 11.625db 0x6 21step = 7.875db 0xe 32step = 12.000db 0x7 23step = 8.625db 0xf 33step = 12.375db
datasheet datasheet 77/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 lout power up control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x0 0xec 0xed - - - - - - 0000 - - index lopwtim this register controls function for pop noise reducer of line amplifier power up and down. lopwtim [3:0] it is the setting for start/stop time of pop noise reducer. this register setting must not be changed during line amplifier active. according to lopwtim setting and sampling frequency, the start/stop time of lineamp is changed as below. please change lopwtim when it changes sampling frequency. evaluate it enough for the decision of the value. start-up/shut-down time [ms] fs=8khz / 16khz / 32khz fs=11.025khz / 22.05khz / 44.1khz fs=12khz / 24khz / 48khz 0x0 0.2 0.3 0.3 0x1 0.4 0.6 0.5 0x2 0.8 1.1 1.0 0x3 1.6 2.3 2.1 0x4 3.1 4.6 4.2 0x5 6.3 9.1 8.4 0x6 12.6 18.2 16.8 0x7 25.1 36.5 33.5 0x8 50.3 72.9 67.0 0x9 100.5 145.9 134.0 0xa 201.1 291.8 268.1 0xb to 0xf write prohibit
datasheet datasheet 78/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 fpll m setting register fpll n setting(l) register fpll n setting(h) register fpll d setting register fpll f setting(l) register fpll f setting(h) register fpll f_d setting(l) register fpll f_d setting(h) register fpll v setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x1 0x02 0x03 - - - - - -----000 0x1 0x04 0x05 00000000 0 x 10 x 0 60 x 0 7-------f p l l n h ( * ) -------0 0x1 0x08 0x09 - - - - - - 00000 0x1 0x0a 0x0b 00000000 0x1 0x0c 0x0d 00000000 0x1 0x0e 0x0f 00000000 0x1 0x10 0x11 00000000 0x1 0x12 0x13 - - - - ----0000 fpllv(*) fpllfdh(*) fpllfdl(*) fpllfh(*) fpllfl(*) fplld(*) index fpllm(*) fpllnl(*) this register is to set pll output clock frequency. please use pll setting calculation program. the program outputs pll register setting values. pll output frequency gets decided by fpll registers as the following expression. pll output frequency (hz)=pll input frequency / fpllm (fplln+fplld/16+fpllf/fpllf_d/16) 2 / fpllv pll cpmode setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x1 0x16 0x17 - - - - - - 00110 cpmode(*) index cpmode[4:0] this bit is to set the on and off of the pll external loop-filter function. if pll is used on condition input frequency is lower th an 2mhz, the external loop-filter is necessary. set this bit ,if the external loop-filter is necessary. recommended external circuit of the loop-filter is decided by pll frequency. please ask recommended circuit, if you need. setting description 0x00110 not use pll chip external loop-filter (default) 0x10110 use pll chip external loop-filter
datasheet datasheet 79/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 headphone output gain setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 10 x 3 60 x 3 7------ ------00 index hpvol this register is to set the gain of headphone output. hpvol[1:0] this bit is to set the gain of headphone output. when beep input is used, please set data to 0x3. setting description 0x0 -6db (it is prohibition to use with beep input) 0x1 0db (it is prohibition to use with beep input) 0x2 3db (it is prohibition to use with beep input) 0x3 6db analog path control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x1 0x3e 0x3f - - half hpbpen lindacen - - 100111 index adcset this register adjusts adc characteristi cs, and set signal path of analog section. adcset this register adjust adc characteristics. use by 0x7 adcset description 0x7 use by 0x7 lindacen set signal path about from dac to linmix amplifier. *please set to ?0? with reco rding monitor mode (0x13=0x07) lindacen description 0 don?t connect dac output to linmix amplifier. 1 connect dac output to linmix amplifier. hpbpen set signal path about from beepin amplifier to head phone amplifier. hpbpin description 0 don?t connect beepin amplifier output to head phone amplifier. 1 connect beepin amplifier output to head phone amplifier. half set the gain of mic amplifier on input block. half description 0 0db 1 -6db
datasheet datasheet 80/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 record l balance volume control register record r balance volume control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x1 0x74 0x75 - - 1000000 0x1 0x76 0x77 - - 1000000 rblvolr index rblvoll this register is to set ?l/r balance? block in digital signal flow, when adc-path is used. left and right volume are available to be set from -6.0db to 6.0db at 0.1db step each. rblvoll, rblvolr[6:0] setting gain(db) setting gain(db) setting gain (db) setting gain(db) 0x04 -6.0 0x24 -2.8 0x44 0.4 0x64 3.6 0x05 -5.9 0x25 -2.7 0x45 0.5 0x65 3.7 0x06 -5.8 0x26 -2.6 0x46 0.6 0x66 3.8 0x07 -5.7 0x27 -2.5 0x47 0.7 0x67 3.9 0x08 -5.6 0x28 -2.4 0x48 0.8 0x68 4.0 0x09 -5.5 0x29 -2.3 0x49 0.9 0x69 4.1 0x0a -5.4 0x2a -2.2 0x4a 1.0 0x6a 4.2 0x0b -5.3 0x2b -2.1 0x4b 1.1 0x6b 4.3 0x0c -5.2 0x2c -2.0 0x4c 1.2 0x6c 4.4 0x0d -5.1 0x2d -1.9 0x4d 1.3 0x6d 4.5 0x0e -5.0 0x2e -1.8 0x4e 1.4 0x6e 4.6 0x0f -4.9 0x2f -1.7 0x4f 1.5 0x6f 4.7 0x10 -4.8 0x30 -1.6 0x50 1.6 0x70 4.8 0x11 -4.7 0x31 -1.5 0x51 1.7 0x71 4.9 0x12 -4.6 0x32 -1.4 0x52 1.8 0x72 5.0 0x13 -4.5 0x33 -1.3 0x53 1.9 0x73 5.1 0x14 -4.4 0x34 -1.2 0x54 2.0 0x74 5.2 0x15 -4.3 0x35 -1.1 0x55 2.1 0x75 5.3 0x16 -4.2 0x36 -1.0 0x56 2.2 0x76 5.4 0x17 -4.1 0x37 -0.9 0x57 2.3 0x77 5.5 0x18 -4.0 0x38 -0.8 0x58 2.4 0x78 5.6 0x19 -3.9 0x39 -0.7 0x59 2.5 0x79 5.7 0x1a -3.8 0x3a -0.6 0x5a 2.6 0x7a 5.8 0x1b -3.7 0x3b -0.5 0x5b 2.7 0x7b 5.9 0x1c -3.6 0x3c -0.4 0x5c 2.8 0x7c 6.0 0x1d -3.5 0x3d -0.3 0x5d 2.9 0x1e -3.4 0x3e -0.2 0x5e 3.0 0x1f -3.3 0x3f -0.1 0x5f 3.1 0x20 -3.2 0x40 0.0 0x60 3.2 0x21 -3.1 0x41 0.1 0x61 3.3 0x22 -3.0 0x42 0.2 0x62 3.4 0x23 -2.9 0x43 0.3 0x63 3.5
datasheet datasheet 81/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 stereo enhancer control register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 10 x 8 60 x 8 7------s t e e ns t e o d ------00 index this register is to set ?stereo enhancer? block in digita l signal flow. this is to control stereo enhancer function. this function is effective for dac-path(pla yback) at ?steen=1? and ?semode[7]=1?. steod this bit is to set number of low pass filter order for stereo enhancer. setting description 0 second-order , lpf1and lpf2 are effective. 1 first-order , only lpf1 is effective. steen this bit is to set enable/disable of low pass filter for stereo enhancer. setting description 0 stereo enhancer disable 1 stereo enhancer enable stereo enhancer lpf1 coefl register stereo enhancer lpf1 coefh register stereo enhancer lpf2 coefl register stereo enhancer lpf2 coefh register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x1 0x88 0x89 00000000 0x1 0x8a 0x8b 00000000 0x1 0x8c 0x8d 00000000 0x1 0x8e 0x8f 00000000 ste2cut[15:8] ste2cut[7:0] ste1cut[15:8] index ste1cut[7:0] this register is to set ?stereo enhancer? block in digital signal flow. this is to set lpf of stereo enhancer function. ste1cut[15:0] this bit is to set the first low pass filter cut off frequency for stereo enhancer. ste2cut[15:0] this bit is to set the second low pass filter cut off frequency for stereo enhancer.
datasheet datasheet 82/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 play programable lpf setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x1 0xa0 0xa1 - - - - - - plpfod plpfen ------00 index this register is to set ?lpf? block for da c-path(playback) in digital signal flow. this is to set enable/disable and filter ord er. this function is effective for dac-path(pla yback) at ?plpfen=1? and ?semode[7]=1?. plpfen this bit is to set enable/disable of low pass filter for dac-path. setting description 0 lpf for dac-path is disable 1 lpf for dac-path is enable plpfod this bit is to set number of low pass filter order for dac-path. setting description 0 lpf for dac-path is second-order 1 lpf for dac-path is first-order play programable lpf coef (l) register play programable lpf coef (h) register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x1 0xa2 0xa3 00000000 0x1 0xa4 0xa5 00000000 plpfc0h index plpfc0l this register is to set ?lpf? block for da c-path(playback) in digital signal flow. this is to set enable/disable and filter ord er. plpfc0l [7:0] / plpfcoh [7:0] this bit is to set low pass filter cut off frequency for dac-path. this value has to change by sampling frequency. please use filter setting calculation program for *plpfc0l / plpfc0h setting.
datasheet datasheet 83/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 rec programable lpf setting register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0 x 10 x a 60 x a 7------r l p f o dr l p f e n ------00 index this register is to set ?lpf? block for a dc-path(record) in digital signal flow. this is to set enable/disable and filter order . this function is exclusive to ?hpf2? controlled by hpf2en of dsp filter function enable register. this function is effective for adc-path(record) at ?rlpfen=1? and ?semode[7]=1?. rlpfen this bit is to set enable/disable of low pass filter for adc-path. rlpfen description 0 lpf for dac-path is disable (hpf2 is available) 1 lpf for dac-path is enable(hpf2 is not available. hpf2en-bit is not valid) rlpfod this bit is to set number of low pass filter order for adc-path. rlpfod description 0 lpf for adc-path is second-order 1 lpf for adc-path is first-order rec programable lpf coef (l) register rec programable lpf coef (h) register mapcon b07 b06 b05 b04 b03 b02 b01 b00 r w (initial) 0x1 0xa8 0xa9 00000000 0x1 0xaa 0xab 00000000 rlpfc0h index rlpfc0l this register is to set ?lpf? block for a dc-path(playback) in digital signal flow. rlpfc0l [7:0] / rlpfcoh [7:0] this bit is to set low pass filter cut off frequency for adc-path. this value has to change by sampling frequency. please use filter setting calculation program for *rlpfc0l / rlpfc0h setting.
datasheet datasheet 84/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 typical performance curves (reference data) figure 38. figure 39. figure 40. figure 41. -90 -80 -70 -60 -50 -40 -30 -20 -10 0 10 -80 -60 -40 -20 0 input level [dbv] thd+n [ db ] -90 -80 -70 -60 -50 -40 -30 -20 -10 0 -80-60-40-20 0 input level [dbv] o utput level [dbfs] -90 -80 -70 -60 -50 -40 -30 -20 -10 0 -80 -60 -40 -20 0 input level [dbv] thd+n [ db ] -90 -80 -70 -60 -50 -40 -30 -20 -10 0 -80 -60 -40 -20 0 input level [dbv] output level [dbfs] input level [dbv] vs output level [dbfs] analog mic input tot adc out, malcen=0 input level [dbv] vs output level [dbfs] analog line input tot adc out, lalcen=0 input level [dbv] vs thd+n[db] analog mic input tot adc out, malcen=0 input level [dbv] vs thd+n [db] analog line input tot adc out, lalcen=0 hvdd1=iovdd=hpvdd =3.3v splvdd=sprvdd=5v, 25 malcmxgain=20.25db malcmxgain=9.0db hvdd1=iovdd=hpvdd =3.3v splvdd=sprvdd=5v, 25 , malcmxgain=20.25db malcmxgain=9.0db lalcmxgain=6.0db lalcmxgain=-9.0db hvdd1=iovdd=hpvdd =3.3v splvdd=sprvdd=5v, 25 , hvdd1=iovdd=hpvdd =3.3v splvdd=sprvdd=5v, 25 lalcmxgain=-9.0db lalcmxgain=6.0db
datasheet datasheet 85/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 figure 42. figure 43. figure 44. figure 45. -70 -60 -50 -40 -30 -20 -10 0 -50 -40 -30 -20 -10 0 input level [dbfs] thd+n[db] -50 -40 -30 -20 -10 0 -50 -40 -30 -20 -10 0 input level [dbfs] output level [dbv] -70 -60 -50 -40 -30 -20 -10 0 -50 -40 -30 -20 -10 0 input level [dbfs] thd+n[db] -50 -40 -30 -20 -10 0 -50 -40 -30 -20 -10 0 input level [dbfs] output level [dbv] input level [dbfs] vs output level [dbv] digital dac input to class-d speaker output spmixg=0db spmixg=12db spmixg=18db spmixg=6db hvdd1=iovdd=hpvdd=3.3v splvdd=sprvdd=5v, 25 , spvol=dsp gain=0db spmixg=0db spmixg=12db spmixg=18db spmixg=6db input level [dbfs] vs thd+n [db] digital dac input to class-d speaker output input level [dbfs] vs output level [dbv] digital dac input to class-ab speaker output hvdd1=iovdd=hpvdd =3.3v splvdd=sprvdd=5v, 25 , spvol=dsp gain=0db spmixg=0db spmixg=12db spmixg=18db spmixg=6db hvdd1=iovdd=hpvdd =3.3v splvdd=sprvdd=5v, 25 , spvol=dsp gain=0db spmixg=0db spmixg=12db spmixg=18db spmixg=6db input level [dbfs] vs thd+n [db] digital dac input to class-ab speaker output hvdd1=iovdd=hpvdd =3.3v splvdd=sprvdd=5v, 25 , spvol=dsp gain=0db
datasheet datasheet 86/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 i/o equivalence circuits no. name i/o power i/o equivalence circuits 17 micbias o hvdd1 37 vmid o regout 33 pllc o regout 15 beepin i regout 16 micbiasref o hvdd1 gnd hvdd1 regout gnd gnd regout regout a gnd hvdd1 a gnd
datasheet datasheet 87/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 no. name i/o power i/o equivalence circuits 32 29 24 22 mclki sdin csb/scl sclk/sad i iovdd 31 30 26 23 28 bclk lrclk irqb sdata/sda sdout io iovdd 25 resetb i iovdd 20 regout o hvdd1 11 12 sprp sprm o sprvdd iovdd dgnd iovdd dgnd iovdd dgnd a gnd hv dd1 sprvdd sprgnd
datasheet datasheet 88/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 no. name i/o power i/o equivalence circuits 14 spmute i iovdd 8 7 splp splm o splvdd 2 1 hpoutr hpoutl o hpvdd 4 hpoutcap o hpvdd 38 40 42 39 41 43 lin1l lin2l lin3l lin1r lin2r lin3r i regout 35 34 minp minm i regout splvdd splgnd hpvdd hpgnd i o vdd dgnd hpvdd hpgnd a gnd regout regout a gnd regout a gnd
datasheet datasheet 89/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 cautions on use 1) absolute maximum ratings an excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices, thus don?t exceed the absolute maximum ratings of supply voltage, temperature. if any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. 2) gnd voltage make setting of the potential of the gnd te rminal so that it will be maintained at the minimum in any operating state. 3) short circuit between terminals and erroneous mounting in order to mount ics on a set pcb, pay thorough attention to the direction and offset of the ics. erroneous mounting can break down the ics. furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the gnd terminal, the ics can break down. 4) operation in strong electromagnetic field be noted that using ics in the strong elec tromagnetic field can malfunction them. 5) thermal design if use speaker amplifier function, please consider power diss ipation by an actual using status, and perform the thermal design which have a margin enough. if an input signal is made ex cessive in the state with insufficient heat dissipation, desired output power may not only be securable, but the thermal shutdown may operate. 6) thermal shutdown this ic has the thermal shutdown circuit. if the therma l shutdown operates, speaker output terminal and headphone output terminal will stop in the open st ate(high impedance state).the the rmal shutdown is only a function for suspending the output operation of ic to the last at the ti me of the thermal run-away under the abnormal condition in which chip temperature(tjmax) exceeded 170 degrees. it is a circuit to protect ic, and the purpose is not offering protection and a guarantee of the set. 7) short protection of output terminals this ic has the short protect function for output terminals. if the short protect function op erates, output terminal will be latched and stop in the open state(high impedanc e state).after a stop, even if a short state is removed, it does not return to normal operation automatically. please once write sp eaker amplifier enable register to make it return. 8) operating condition operating voltage and operating temperat ure are ranges which perform basic function. electrical characteristics and absolute maximum rating are not guaranteed in full voltage range or full temperature range. 9) electrical characteristics specification each audio characteristic specification, such as limit output power, total harm onic distortion, the maximum gain, an alc limit level, and an alc release level, shows the standard perf ormance of the device, and depen ds for it on board layout / use parts / power supply part greatly. typical specification value is a value when a device and each parts are directly mounted in the board of rohm's standard. 10) power supply since the speaker l power supply (splvdd) and the speaker r power supply (sprvdd) are shorted inside ic, please use them as a same power supply. moreover, large peak current rushes into a power supply line at the time of classd speaker amplifier use. the audio characteristic is affected by the value of a power supply decoupling capacitor, and layout. the power supply decoupling capacitor should be layouted (1uf or more) with sufficiently low esr (equivalent series resistance) to most close of ic terminal. moreover, in the design of a board pattern, the wiring of a power supply / gnd line should become low impedance. in that case, even if digital power supply and analog power supply are same potential, pl ease devide the digital power pattern and the analog power pattern and reduce a surroundings lump of the digital noise to the analog power supply by the common impedance of a wiring pattern. please take the same pattern design into consideration al so about a gnd line. moreover, while inserting a capacitor between power supply-gnd terminals about all the power supp ly terminals of lsi, and please determine the value of capacitor after sufficient confirmation that there is no problem in the characteristics of capacitors to be used (a capacity omission happens at low temperature) in the case of electrolytic capacitors use. 11) external capacitor in order to use a ceramic capacitor as the external capaci tor, determine the constant wi th consideration given to a degradation in the nominal capacitance due to dc bias and c hanges in the capacitance due to temperature, etc.
datasheet datasheet 90/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 12) status of this document the japanese version of this document is formal specification. a customer may use this translation version only for a reference to help reading the formal version. if there are any differences in translation version of this document formal version takes priority.
datasheet datasheet 91/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 ordering information b u 2 6 1 5 6 r f s e 2 package rfs:htssop-a44r packaging and forming specification e2: embossed tape and reel physical dimension tape and reel information package name vqfn040v6060 marking diagram htssop-a44r (top view) part number marking lot number 1pin mark
datasheet datasheet 92/92 BU26156RFS tsz02201-0v1v0e502570-1-2 ? 2014 rohm co., ltd. all rights reserved. jul.1.2014 rev.001 www.rohm.co.jp tsz22111 ? 15 ? 001 revision history date revision page item changes jun.24.2014 rev.001 - - rev.001. release.
notice - ge rev.00 3 ? 20 13 rohm c o., ltd. all rights reserved. notice precaution on using rohm products 1. our products are designed and manufactured for application in ordinary electronic equipments (such as av equipment, oa equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). if you intend to use our products in devices requiring extremely high reliability (such as medical equipment (note 1) , transport equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property ( specific applications ), please consult with the rohm sales representative in advance. unless otherwise agreed in writing by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any rohm s products for specific applications. (n ote1) m edical equipment c lassifica tion of the s pecific applications japan usa eu china class class class b class class class 2. rohm designs and manufactures its products subject to strict quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which a failure or malfunction of our products may cause. the following are examples of safety measures: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditions, as exemplified below. accordingly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arisi ng from the use of any rohms products under any special or extraordinary environments or conditions. if you intend to use our products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] use of our products in any types of liquid, including water, oils, chemicals, and organic solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products are exposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed to static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing components, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subject to radiation-proof design. 5. please verify and confirm characteristics of the final or mounted products in using the products. 6. in particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7. de -rate power dissipation (pd) depending on ambient temperature (ta). when used in sealed area, confirm the actual ambient temperature. 8. confirm that operation temperature is within the specified range described in the product specification. 9. rohm shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. in principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must be used on a through hole mount products. i f the flow soldering method is preferred on a surface-mount products , please consult with the rohm representative in advance. for details, please refer to rohm mounting specification
notice - ge rev.00 3 ? 20 13 rohm c o., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the characteristics of the products and external components, including transient characteristics, as well as static characteristics. 2. you agree that application notes, reference designs, and associated data and information contained in this document are presented only as guidance for products use. therefore, in case you use such information, you are solel y responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take proper caution in your manufacturing process and storage so that voltage exceeding the products maximum rating will not be applied to products. please take special care under dry condition (e.g. grounding of human body / equipment / solder iron, isolation from charged objects, setting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriorate if the products are stored in the places where: [a] the products are exposed to sea winds or corrosive gases, including cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to direct sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage condition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm solderability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the correct direction, which is indicated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. use products within the specified time after opening a humidity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage time period. precaution for product label qr code printed on rohm products label is for rohm s internal use only. precaution for disposition when disposing products please dispose them properly using an authorized industry waste company. precaution for foreign exchange and foreign trade act since our products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act, please consult with rohm representative in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to application example contained in this document is for reference only. rohm does not warrant that foregoing information or data will not infringe any intellectual property rights or any other rights of a ny third party regarding such information or data. rohm shall not be in any way responsible or liable for infringement of any intellectual property rights or other damages arising from use of such information or data.: 2. no license, expressly or implied, is granted hereby under any intellectual property rights or other rights of rohm or any third parties with respect to the information contained in this document. other precaution 1 . this document may not be reprinted or reproduced, in whole or in part, without prior written consent of rohm. 2. the products may not be disassemble d, converted, modified, reproduced or otherwise chang ed without prior written consent of rohm. 3 . i n no event shall you use in any way whatsoever the products and the related technical information contained in the products or this document for any military purposes , including but not limited to, the develop ment of mass - destruction weapons . 4 . the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties.
datasheet datasheet notice ? we rev.001 ? 2014 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information.

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